參數(shù)資料
型號： ZL30102
廠商： Zarlink Semiconductor Inc.
英文描述： T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110
中文描述： T1/E1的地層4/4E冗余系統(tǒng)時鐘同步的的DS1/E1和H.110
文件頁數(shù)： 15/50頁
文件大?。?/td> 481K
代理商： ZL30102
ZL30102
Data Sheet
15
Zarlink Semiconductor Inc.
When the incoming signal returns to normal (REF_FAIL=0), the DPLL returns to Normal mode with the output
signal locked to the input signal. Each of the monitors has a built-in hysteresis to prevent flickering of the REF_FAIL
status pin at the threshold boundaries. The precise frequency monitor and the timer do not affect the mode
(Holdover/Normal) of the DPLL.
If the device is set to Automatic mode (MODE_SEL1:0=11), then the state machine does not immediately switch to
another reference. If the single cycle and/or coarse frequency failures persist for more than 2.5 s or the precise
frequency monitor detects a failure, then the state machine will switch to another valid reference if that is available.
If there no other reference available, it stays in Holdover mode.
The precise frequency monitor’s failure thresholds are selected with the OOR_SEL input based on the ZL30102
applications, Table 1. Figure 5 and Figure 6 show the out of range limits for various master clock accuracies. It will
take the precise frequency monitor up to 10 s to qualify or disqualify the input reference.
Figure 5 - DS1 Out-of-Range Thresholds for OOR_SEL=0
Figure 6 - E1 Out-of-Range Thresholds for OOR_SEL=1
In addition to the monitoring of the REF2 reference signal the companion REF2_SYNC input signal is also
monitored for failure (see Figure 7).
C20 Clock Accuracy
0 ppm
+32 ppm
-32 ppm
0
51
83
64
32
32
-32
-96
-75
-50
0
-25
25
75
Frequency offset [ppm]
Out of Range
Out of Range
Out of Range
In Range
In Range
In Range
C20
50
-64
-83
115
96
-32
-51
-115
C20
C20
100
-100
C20: 20 MHz master oscillator clock
0 ppm
+50 ppm
-50 ppm
0
50
130
100
50
80
-50
-150
-150
-100
0
-50
50
150
Frequency offset [ppm]
Out of Range
Out of Range
Out of Range
In Range
In Range
In Range
C20
100
-100
-130
180
150
-50
-80
-180
C20
C20
-200
200
C20: 20 MHz master oscillator clock
C20 Clock Accuracy
相關(guān)PDF資料
PDF描述
ZL30102QDG T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110
ZL30105QDG1 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110
ZL30105 Power Clamp On Multimeter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Approval Categories:CAT III 600V; Calibrated:No; Current Measuring Range:0-400.0A; Current Setting AC:400A RoHS Compliant: NA
ZL30105QDG Digital Clamp-On Meter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Calibrated:No; Current Setting AC:1000A; Resistance Measuring Range:400 Ohm to 10 MOhm; Voltage Measuring Range AC:600V RoHS Compliant: NA
ZL30106QDG1 SONET/SDH/PDH Network Interface DPLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL30102_05 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110
ZL30102QDG 制造商:Zarlink Semiconductor Inc 功能描述:PLL CLOCK SYNTHESIZER SGL 64TQFP - Trays
ZL30102QDG1 制造商:Microsemi Corporation 功能描述:PB FREE T1/E1 SYSTEM SYNCHRONIZER - Trays 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE T1/E1 SYSTEM SYNCHRONIZER - Trays
ZL30105 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
ZL30105_05 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*