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XRT94L31
120
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
NOTE: The values for t18, t19 and t20 can be found in
1.7
TRANSMIT ORDERWIRE (E1, F1, E2) BYTE OVERHEAD INPUT PORT
The Transmit Order-wire Byte Overhead Input Port provides a dedicated port for the user to insert his/her own
value for the E1, F1 and E2 bytes within the outbound STS-3/STM-1 data-stream. The user should note that
the TxE1F1E2 input pin is sampled (by the Transmit Order-wire Byte Overhead Input Port) upon the rising
edge of TxTOHClk. All of the remaining signals (e.g., TxE1F1E2Enable, TxE1F1E2Frame) are updated upon
the falling edge of TxTOHClk. The timing wave-form and information for the Transmit Order-wire Byte
Overhead Input Port is presented below.
FIGURE 23. ILLUSTRATION OF TIMING WAVE-FORM OF THE TRANSMIT POH OVERHEAD INPUT PORT
TABLE 24: TIMING INFORMATION FOR THE TRANSMIT POH OVERHEAD INPUT PORT
SYMBOL
DESCRIPTION
MIN.
TYP.
MAX.
t18
Falling edge of TxPOHClk to rising edge of TxPOHFrame and TxPOHValid
output delay
-0.3ns
0.2ns
t19
TxPOHIns to rising edge of TxPOHClk set-up time
4ns
t20
TxPOH Data to rising edge of TxPOHClk set-up time
4ns
TxPOH
TxPOHIns
TxPOHClk
TxPOHFrame
TxPOHEnable
t18
t19
t20