REV. 1.0.1 AG8 STS1RXD_CK_2 RXVALIDFCS_2 RXGFCCLK_2 O CMOS Receive STS-1 Telecom Bu" />
參數(shù)資料
型號： XRT94L31IB-L
廠商： Exar Corporation
文件頁數(shù)： 104/133頁
文件大?。?/td> 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
標(biāo)準(zhǔn)包裝： 24
應(yīng)用： 網(wǎng)絡(luò)切換
接口： 總線
電源電壓： 3.14 V ~ 3.47 V
封裝/外殼： 504-LBGA
供應(yīng)商設(shè)備封裝： 504-TBGA（35x35）
包裝： 托盤
安裝類型： 表面貼裝
XRT94L31
72
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
AG8
STS1RXD_CK_2
RXVALIDFCS_2
RXGFCCLK_2
O
CMOS
Receive STS-1 Telecom Bus Clock Output - Channel 2;
The function of this input pin depends upon whether or not the STS-1
Telecom Bus Interface associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled
- STS-1 Receive Telecom Bus Clock Output - Channel 2;
STS1RXD_CK_2:
All signals, which are output via the Receive Telecom Bus - Channel 2
are clocked out upon the rising edge of this clock signal. This includes
the following signals.
STS1RXD_D_2[7:0]
STS1RXD_ALARM_2
STS1RXD_DP_2
STS1RXD_PL_2
STS1RXD_C1J1_2
This clock signal will operate at 19.44MHz. (For STS-3 mode) or
6.48MHz (Fro STS-1 mode)
RXVALIDFCS_2 (Receive HDLC block valid FCS Indicator - Channel
2)
RXGFCCLK_2 (Receive ATM GFC clock signal - Channel 2)
A20
D26
AE11
STS1RXD_PL_0
RXIDLE_0
RXLCD_0
STS1RXD_PL_1
RXIDLE_1
RXLCD_1
STS1RXD_PL_2
RXIDLE_2
RXLCD_2
O
CMOS
STS-1 Receive (Drop) Telecom Bus - Payload Indicator Output Sig-
nal - Channel n:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface block associated with Channel n has been
enabled or disabled.
If the STS-1 Telecom Bus Interface (associated with Channel n) is
enabled
- STS-1/STS-1 Receive (Drop) Telecom Bus - Payload Indicator Output -
STS1RXD_PL_0:
This output pin indicates whether or not Transport Overhead bytes are
being output via the STS1RXD_D_0[7:0] output pins.
This output pin is pulled "Low" for the duration that the STS-1 Receive
Telecom Bus is transmitting a Transport Overhead byte via the
STS1RXD_D_0[7:0] output pins.
Conversely, this output pin is pulled "High" for the duration that the STS-
1 Receive Telecom Bus is transmitting something other than a Transport
Overhead byte via the STS1RXD_D_0[7:0] output pins.
RXIDLE_0 (Receive HDLC block idle indicator - Channel n)
RXLCD_0 (Receive Cell Processor Loss of Cell Delineation - Chan-
nel n)
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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