參數(shù)資料
型號(hào): XRT73L04BIV-F
廠商: Exar Corporation
文件頁(yè)數(shù): 30/64頁(yè)
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 4CH 144LQFP
標(biāo)準(zhǔn)包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
XRT73L04B
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
32
.
2.4.1
Enabling the Transmit Line Build-Out Cir-
cuit
If the Transmit Line Build-Out Circuit is enabled, then
the Transmit Section of the Channel outputs shaped
pulses onto the line via the TTIP_(n) and TRing_(n)
output pins.
Enable the Transmit Line Build-Out circuit for each
channel by doing the following:
a. Operating in the Hardware Mode
Set the TxLEV_(n) input pin to “Low".
b. Operating in the HOST Mode
Set the TxLEV_(n) bit-field to "0", as illustrated below.
2.4.2
Disabling the Transmit Line Build-Out Cir-
cuit
If the Transmit Line Build-Out circuit is disabled, then
the XRT73L04B outputs partially shaped pulses onto
the line via the TTIP_(n) and TRing_(n) output pins.
Disable the Transmit Line Build-Out circuit by doing
the following:
a. Operating in the Hardware Mode
Set the TxLEV_(n) input pin to “High".
b. Operating in the HOST Mode
Set the TxLEV_(n) bit-field to "1" as illustrated below.
FIGURE 20. THE BELLCORE GR-253-CORE TRANSMIT OUTPUT PULSE TEMPLATE FOR SONET STS-1 APPLI-
CATIONS
ST S-1 Pulse T emplate
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
-1
-0
.9
-0
.8
-0
.7
-0
.6
-0
.5
-0
.4
-0
.3
-0
.2
-0
.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
Tim e, in UI
N
o
rm
al
iz
ed
A
m
p
li
tu
d
e
Lower Curve
Upper Curve
COMMAND REGISTER, CR1-(n)
D4
D3
D2
D1
D0
TxOFF_(n)
TAOS_(n)
TxClkINV_(n)
TxLEV_(n)
Reserved
0X
X
0X
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