參數(shù)資料
型號: XRT73L04BIV-F
廠商: Exar Corporation
文件頁數(shù): 22/64頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 4CH 144LQFP
標(biāo)準(zhǔn)包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
XRT73L04B
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
25
In HOST Mode Operation, the TxOFF input pins can
be used to turn on or turn off the Transmit Output
Drivers within all Channels concurrently. The intent
behind this feature is to permit a system designed for
redundancy to quickly switch out a defective line card
and switch-in the back-up line card.
1.0
SELECTING THE DATA RATE
Each channel within the XRT73L04B can be config-
ured to support the E3 (34.368 Mbps), DS3 (44.736
Mbps) or the SONET STS-1 (51.84 Mbps) rates. Fur-
ther, each channel can be configured to operate in a
mode/data rate that is independent of the other chan-
nels.
Two methods are available to select the data rate for
each channel of the XRT73L04B.
1.1
CONFIGURING CHANNEL(n)
For the following disscussion the reader should refer
toTable 2 to determine the appropriate Address for
each command register of each channel in the
XRT73L04B. The command register description re-
fers to CR(x)-(n), where (x) = 0 to 7 and (n) refers to a
particular channel of the XRT73L04B.
FIGURE 13. FUNCTIONAL BLOCK DIAGRAM OF THE XRT73L04B
RLOS_(n)
LLB_(n)
RLB_(n)
TAOS_(n)
TPData_(n)
TNData_(n)
TxClk_(n)
TxLEV_(n)
TxOFF
Channel 2
AGC/
Equalizer
Serial
Processor
Interface
Peak
Detector
LOS Detector
Slicer
Clock
Recovery
Data
Recovery
Invert
Loop MUX
HDB3/
B3ZS
Decoder
LOSTHR
SDI
SDO
SClk
CS/(SR/DR)
REGR
RTIP_(n)
RRing_(n)
REQEN_(n)
Channel 0
Channel 1
Notes: 1. (n) = 0, 1, 2 , or 3 for respective Channels
2. Serial Processor Interface input pins are shared by the four Channels in HOST Mode and redefined in
Hardware Mode.
Device
Monitor
MTIP_(n)
MRing_(n)
DMO_(n)
Transmit
Logic
Duty Cycle Adjust
TTIP_(n)
TRing_(n)
Pulse
Shaping
HDB3/
B3ZS
Encoder
E3_(n)
STS-1/DS3_(n)
Host/(HW)
RLOL_(n)
EXClk_(n)
RxOFF
RxClkINV
RxClk_(n)
RPOS_(n)
RNEG_(n)/
(LCV_(n))
Channel 3
Tx
Control
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