參數(shù)資料
型號(hào): XRT73L04BIV-F
廠商: Exar Corporation
文件頁(yè)數(shù): 25/64頁(yè)
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 4CH 144LQFP
標(biāo)準(zhǔn)包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
XRT73L04B
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
27
Address:
The register addresses are presented in the Hexa-
decimal format.
Type:
The Command Registers are either Read-Only (RO)
type of registers or Read/Write (R/W) type of regis-
ters.
The default value for each of the bit-fields within these reg-
isters is "0".
a. Operating in the Hardware Mode.
In order to configure individual Channels into the ap-
propriate mode, set the E3_(n), and the STS-1/
DS3_(n) input pins (where n = 0, 1, 2, or 3) to the ap-
propriate logic states, as presented below inTable 3.
b. Operating in the HOST Mode.
To configure a Channel into the appropriate mode,
write the appropriate values into the STS-1/DS3_(n)
and E3_(n) bit-fields within the Command Register
CR4-(n), as illustrated below (refer to Table 2 for the
correct address for each channel).
Table 4 relates the values of these two bit-fields to the
selected data rates.
CHANNEL3
0x18
CR0-3
RO
RLOL_3
RLOS_3
ALOS_3
DLOS_3
DMO_3
0x19
CR1-3
R/W
TxOFF_3
TAOS_3
TxClkINV_3
TxLEV_3
Reserved
0x1A
CR2-3
R/W
Reserved
ALOSDIS_3
DLOSDIS_3
REQEN_3
0x1B
CR3-3
R/W
(SR/DR)_3
LOSMUT_3
RxOFF
RxClk_3INV
Reserved
0x1C
CR4-3
R/W
Reserved
STS-1/DS3_3
E3_3
LLB_3
RLB_3
0x1D
CR5-3
R/W
Reserved
0x1E
CR6-3
R/W
Reserved
0x1F
CR7-3
R/W
Reserved
TABLE 2: HEXADECIMAL ADDRESSES AND BIT FORMATS OF XRT73L04B COMMAND REGISTERS
REGISTER BIT-FORMAT
ADDRESS
COMMAND
REGISTER
TYPE
D4
D3
D2
D1
D0
TABLE 3: SELECTING THE DATA RATE FOR CHANNEL(n) VIA THE E3_(n) AND STS-1/DS3_(n) INPUT PINS
(HARDWARE MODE)
DATA RATE
STATE OF E3_
(n) PIN
STATE OF STS-1/DS3_
(n) PIN
MODE OF B3ZS/HDB3 ENCODER/
DECODER BLOCKS
E3 (34.368 Mbps)
1
X (Don’t Care)
HDB3
DS3 (44.736 Mbps)
00
B3ZS
STS-1 (51.84 Mbps)
01
B3ZS
COMMAND REGISTER, CR4-(n)
D4
D3
D2
D1
D0
X
STS-1/(DS3)_(n))
E3_(n)
LLB_(n) RLB_(n)
x
xx
x
TABLE 4: SELECTING THE DATA RATE FOR CHANNEL(n)
VIA THE
STS-1/DS3_(n) AND THE E3_(n) BIT-FIELDS
WITHIN THE
APPROPRIATE COMMAND REGISTER (HOST
MODE)
SELECTED DATA
RATE
STS-1/DS3_
(n)
(D3)
E3_
(n)
(D2)
E3
X (Don’t Care)
1
DS3
0
STS-1
1
0
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