XRT72L52
56
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.0.3
If this bit-field is set to "0" then the Receive Section is currently not detecting the Idle-pattern in the incoming
DS3 data stream.
If this bit-field is set to "1" then the Receive Section is currently detecting the Idle pattern in the incoming DS3
data stream.
NOTE: For more information on the Idle Pattern, refer to
Bit 4 - RxOOF (Receive Out-of-Frame) Indicator
This Read-Only bit-field indicates whether or not the Receive Section of the channel is currently declaring an
OOF condition.
If this bit-field is set to "0", then the Receive Section is currently not declaring the OOF condition.
If this bit-field is set to "1", then the Receive Section is currently declaring the OOF condition.
NOTE: For more information on the OOF Declaration criteria, for DS3 applications, refer to
Bit 3 - Reserved
Bit 2 - Framing On Parity ON/OFF Select
This Read/Write bit field allows the user to require that the Receive DS3/E3 Framer block include Parity (P-bit)
verification as a condition for declaring itself In-Frame during Frame Acquisition. This requirement will be
imposed in addition to those criteria selected via Bits 0 and 1 of this register.
This feature also imposes an additional Frame Maintenance requirement on the Receive DS3/E3 Framer
block, in addition to the requirements specified in the user's selection of Bits 0 and 1 of this register. In
particular, if this additional requirement is implemented, the Receive DS3/E3 Framer block will perform a frame
search if it detects P-bit errors in at least 2 out of 5 DS3 Frames.
Writing a "1" to this bit-field imposes these
additional requirements.
Whereas, writing a '0' causes the Receive DS3/E3 Framer block to waive this
requirement.
NOTE: For more information on Framing with Parity, refer to
Bit 1 - F Sync Algo(rithim Select)
This Read/Write bit-field, in conjunction with Bits 0 and 2 of this register, allows the user to completely define
the Frame Maintenance Criteria of the Receive DS3/E3 Framer block. This particular bit-field allows the user
to define the Frame Maintenance Criteria as it applies to F-bits.
If the user writes a "1" to this bit-field, then the Receive DS3/E3 Framer block will declare an Out of Frame
(OOF) condition if 3 out of 16 F-Bits are in Error. If the user writes a "0" to this bit-field, then the Receive DS3/
E3 Framer block will declare an Out of Frame (OOF) condition if 6 out of 16 F-bits are in error.
NOTE: For more information on the use of this bit, and the Framing Maintenance operation of the Receive DS3/E3 Framer
block, refer to
Bit 0 - M Sync Algo(rithm Select)
This Read/Write bit-field in conjunction with Bits 1 and 2 of this register, allows the user to completely define
the Frame Maintenance Criteria of the Receive DS3/E3 Framer block. This particular bit-field allows the user
to define the Frame Maintenance criteria, as it applies to M-bits.
If the user writes a "1" to this bit-field, then the Receive DS3/E3 Framer block will declare an Out of Frame
(OOF) condition if 3 out of 4 M-bits are in error. If the user writes a "0" to this bit-field, then the Receive DS3/E3
Framer block will ignore the occurrence of M-bit errors while operating in the Frame Maintenance mode.
NOTE: For more information on the use of this bit-field, and the Framing Maintenance operation of the Receive DS3/E3
Framer block, refer to