XRT72L52
398
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.0.3
Terminal Equipment. The Remote Terminal Equipment will use this information in order to verify that it is still
receiving data from its intended transmitter. The specific use of these registers follows.
For Trail Trace Buffer Message purposes, the Transmit E3 Framer block will group 16 consecutive E3 frames,
into a Trail Trace Buffer super-frame. When the Transmit E3 Framer block is generating the first E3 frame,
within a Trail Trace Buffer super-frame, it will read in the contents of the Tx TTB-0 Register (Address = 0x38)
and insert this value into the TR byte-field of this very first Outbound E3 frame. When the Transmit E3 Framer
is generating the very next E3 frame (e.g., the second E3 frame, within the Trail Trace Buffer super-frame), it
will read in the contents of the Tx TTB-1 register (Address = 0x39) and insert this value into the TR byte-field of
this Outbound E3 frame. As the Transmit E3 Framer block is creating each subsequent E3 frame, within this
Trail Trace Buffer super frame, it will continue to increment to the very next Transmit Trail Trace Buffer register.
The Transmit E3 Framer block will then read in the contents of this particular Transmit Trail Trace Buffer
register (Tx TTB-n) and insert this value into the TR byte-field of the very next Outbound E3 frame. After the
Transmit E3 Framer block has created the 16th E3 frame, within a given Trail Trace Buffer super-frame (e.g., it
has read in the contents of Tx TTB-15 register and has inserted this value into the TR byte of the 16th E3
frame), it will begin to create a new Trail Trace Buffer super-frame, by reading the contents of the Tx TTB-0
register, and repeating the above-mentioned procedure.
The contents of the Tx TTB-0 register will typically be of the form [1, C6, C5, C4, C3, C2, C1, C0]. The “1” in
the MSB (Most Significant bit) position of this byte is used to designate that this octet is the frame-start marker
(e.g., is the first of the 16 TR bytes, within a Trail Trace Buffer super-frame). The remaining Trail Trace Buffer
registers (TxTTB-1 through TxTTB-15) will typically contain a “0” in their MSB positions. The remaining bits
within the Tx TTB-0 register C6 through C0 are the CRC-7 bits calculated over the contents of all 16 TR bytes,
within the previous Trail Trace Buffer super-frame. The contents of the remaining Trail Trace Buffer registers
(e.g., Tx TTB-1 through Tx TTB-15) will typically contain the 15 ASCII characters required for the E.164
numbering format.
NOTES:
1.
The XRT72L52 Framer IC will not compute the CRC-7 value, to be written into the Tx TTB-0 register. The user’s
system must compute this value prior to writing it into the Tx TTB-0 register.
2.
The user, when writing data into the Tx TTB registers, must take care to insure that only the Tx TTB-0 register
contains an octet with a “1” in the MSB (most significant bit) position. All remaining Tx TTB registers (e.g., Tx
TTB-1 through Tx TTB-15) must contain octets with a “0” in the MSB position. The reason for this cautionary note
is presented in
6.2.5
The Transmit E3 Line Interface Block
The XRT72L52 Framer IC is a digital device that takes E3 payload and overhead bit information from some
terminal equipment, processes this data and ultimately, multiplexes this information into a series of Outbound
E3 frames. However, the XRT72L52 Framer IC lacks the current drive capability to be able to directly transmit
this E3 data stream through some transformer-coupled coax cable with enough signal strength for it to be
received by the remote receiver. Therefore, in order to get around this problem, the Framer IC requires the use
of an LIU (Line Interface Unit) IC.
An LIU is a device that has sufficient drive capability, along with the
necessary pulse-shaping circuitry to be able to transmit a signal through the transmission medium in a manner
that it can be reliably received by the far-end receiver. Figure 165 presents a circuit drawing depicting the
Framer IC interfacing to an LIU (XRT73L00 DS3/E3/STS-1 Transmit LIU).