
XRT7250
DS3/E3 FRAMER IC
á
REV. 1.1.1
84
Bit 0 - Flag Present
The LAPD Receiver will assert this read-only bit-field
when it is currently detecting the Flag Sequence octet
(7Eh) in the incoming LAPD channel (e.g., either the
GC or the NR byte-field, within each E3 frame). The
LAPD Receiver will negate this bit-field when it is no
longer receiving the Flag Sequence octet in the in-
coming LAPD channel.
2.3.4.9
Receive E3 Service Bits Register (E3,
ITU-T G.751)
Bit 1 - RxA (A-Bit)
This Read-Only bit-field reflects the state of the “A”
bit-field, within the most recently received E3 frame.
Bit 0 - RxN (N-Bit)
This Read-Only bit-field reflects the state of the “N”
bit-field, within the most recently received E3 frame.
2.3.5
Transmit DS3 Configuration Registers
2.3.5.1
Transmit DS3 Configuration Register
(DS3 Applications)
Bit 7 - Tx Yellow Alarm
This Read/Write bit-field permits the user to com-
mand the Transmit DS3 Framer to transmit a Yellow
Alarm (e.g., X bits are all "0") in the outbound DS3
data stream.
Writing a "0" to this bit-field disables this feature (the
default condition). In this condition, the X-bits in the
out-bound DS3 frame, are internally generated
(based upon receiver conditions).
Writing a "1" to this bit-field invokes this command. In
this condition, the Transmit DS3 Framer will override
the internally-generated X-bits and force all of the X-
bits of each outbound DS3 frame to "0".
NOTE: For more information in this feature, please see Sec-
tion 3.2.4.2.1.1.
NOTE: This bit-setting is ignored if Bits 3, 4 or 5 (within this
register) are set to "1".
Bit 6 - Tx X-Bit (Force X bits to "1")
This "Read/Write" bit-field permits the user to com-
mand the Transmit DS3 Framer to force all of the X-
bits, in the outbound DS3 Frames, to "1".
Writing a "0" to this bit-field disables this feature (the
default condition). In this case, the Transmit DS3
Framer will generate X-bits based upon the receive
conditions.
Writing a "1" to this bit-field invokes this command. In
this case, the Transmit DS3 Framer will overwrite the
internally-generated X-bits and set them all to "1".
NOTE: For more information on this feature, please see
Section 3.2.4.2.1.2.
NOTE: This bit-setting is ignored if Bits 3, 4, 5, or 7 (within
this register) are set to "1".
Bit 5 - Tx Idle (Pattern)
This Read/Write bit-field permits the user to com-
mand the Transmit DS3 Framer to transmit the Idle
Condition pattern. If the user invokes this command,
then the Transmit DS3 Framer will force the outbound
DS3 Frames to have the following patterns.
Valid M-bits, F-bits and P-bits
The three CP-Bits (F-frame #3) are "0"
The X-bits are set to "1"
A repeating "1100..." pattern in written into the pay-
load portion of the DS3 Frames.
RXE3 SERVICE BIT REGISTER (ADDRESS = 0X1A)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Not Used
RxA
RxN
RO
00
000
TRANSMIT DS3 CONFIGURATION REGISTER (ADDRESS = 0X30)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Tx Yellow
Alarm
Tx X Bits
Tx Idle
Tx AIS
Tx LOS
FERF on
LOS
FERF on
OOF
FERF on
AIS
R/W
00
000
111