
XRT7250
á
DS3/E3 FRAMER IC
REV. 1.1.1
414
1. Sample the state of the RxOHFrame signal (e.g.,
the Rx_Start_of_Frame input signal) on the rising
edge of the RxOHClk (e.g., the
E3_OH_Clock_In) signal.
2. Keep track of the number of rising clock edges
that have occurred in the RxOHClk (e.g., the
E3_OH_Clock_In) signal, since the last time the
RxOHFrame signal was sampled “High”. By
doing this, the Terminal Equipment will be able to
keep track of which overhead byte is being output
via the RxOH output pin. Based upon this infor-
mation, the Terminal Equipment will be able to
derive some meaning from these overhead bits.
Table 88 relates the number of rising clock edges (in
the RxOHClk signal, since the RxOHFrame signal
was last sampled “High”) to the E3 Overhead bit that
is being output via the RxOH output pin.
TABLE 87: LISTING AND DESCRIPTION OF THE PIN ASSOCIATED WITH THE RECEIVE OVERHEAD DATA OUTPUT
INTERFACE BLOCK
SIGNAL NAME
TYPE
DESCRIPTION
RxOH
Output
Receive Overhead Data Output pin:
The XRT7250 will output the overhead bits, within the incoming E3 frames, via this pin.
The Receive Overhead Data Output Interface block will output a given overhead bit, upon the
falling edge of RxOHClk. Hence, the external data link equipment should sample the data, at
this pin, upon the rising edge of RxOHClk.
The XRT7250 will always output the E3 Overhead bits via this output pin. There are no exter-
nal input pins or register bit settings available that will disable this output pin.
RxOHClk
Output
Receive Overhead Data Output Interface Clock Signal:
The XRT7250 will output the Overhead bits (within the incoming E3 frames), via the RxOH out-
put pin, upon the falling edge of this clock signal.
As a consequence, the user's data link equipment should use the rising edge of this clock sig-
nal to sample the data on both the RxOH and RxOHFrame output pins.
This clock signal is always active.
RxOHFrame
Output
Receive Overhead Data Output Interface - Start of Frame Indicator:
The XRT7250 will drive this output pin "High" (for one period of the RxOHClk signal), whenever
the first overhead bit within a given E3 frame is being driven onto the RxOH output pin.
TABLE 88: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN RXOHCLK, (SINCE
RXOHFRAME WAS LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH
OUTPUT PIN
NUMBER OF RISING CLOCK EDGES IN RXOHCLK
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT7250
0 (Clock edge is coincident with RxOHFrame being detected “High”)
FA1 Byte - Bit 7
1
FA1 Byte - Bit 6
2
FA1 Byte - Bit 5
3
FA1 Byte - Bit 4
4
FA1 Byte - Bit 3
5
FA1 Byte - Bit 2
6
FA1 Byte - Bit 1
7
FA1 Byte - Bit 0
8
FA2 Byte - Bit 7
9
FA2 Byte - Bit 6
10
FA2 Byte - Bit 5