參數(shù)資料
型號: XRS10L120
廠商: Exar Corporation
英文描述: SERIAL ATA II: 1:2 PORT MULTIPLIER
中文描述: 串行ATA II:1:2端口倍增器
文件頁數(shù): 24/52頁
文件大小: 399K
代理商: XRS10L120
XRS10L120
PRELIMINARY
22
SERIAL ATA II: 1:2 PORT MULTIPLIER
REV. P1.0.1
4.2
Macro Registers
The registers outlined in this section are common to each of the three Serial ATA dual PHY macros as
described in the previous section. As such, each listed register is present in each of the 1, 2, and 3 MDIO
register spaces, and will perform the stated function on the specified Serial ATA lane.
The registers within each dual PHY macro are split into three sections:
Transmit/receive lane 0 registers:
Address range 000*****
Transmit/receive lane 1 registers:
Address range 001*****
PLL registers:
Address range 010*****
Bias generator registers:
Address range 011*****
T
ABLE
9: T
RANSMIT
/R
ECEIVE
L
ANE
R
EGISTERS
(MDIO D
EVICE
1
AND
2)
A
DDRESS
H
EX
B
IT
(
S
)
N
AME
R/W
D
EFAULT
D
ESCRPTION
N.0000
N.0021
7:6
Reserved
RO
-
Reserved
5:4
5:4
Receive_Test0[1:0]
Receive_Test1[1:0]
R/W
00
PRBS checker control
00 = disable PRBS checkers
01 = enable 2^23-1 checkers
10 = enable 2^31-1 checkers
11 = enable 2^10-1 checkers
3:2
3:2
Transmit_Test0[1:0]
Transmit_Test1[1:0]
R/W
00
Test Pattern Control
00 = Use input data from DATAIN
01 = Generate 2^23-1 PRBS
10 = Generate 2^31-1 PRBS
11 = Generate 2^10-1 PRBS
1
selFourFive
R/W
1
0 = Output data is x8
1 = Output data is x10
0
SATAPCIEXB[
R/W
1
Tx output swing booster bit
0 = boost swing by 10%
1 = nominal swing
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