參數(shù)資料
型號: XRS10L120
廠商: Exar Corporation
英文描述: SERIAL ATA II: 1:2 PORT MULTIPLIER
中文描述: 串行ATA II:1:2端口倍增器
文件頁數(shù): 20/52頁
文件大小: 399K
代理商: XRS10L120
XRS10L120
PRELIMINARY
18
SERIAL ATA II: 1:2 PORT MULTIPLIER
REV. P1.0.1
3.2
CMOS Interface
AC and DC specifications for the CMOS inputs and outputs are listed in
Table 4
. Since all these signals are
asychronous, there are no setup or hold times defined. The CMOS pins are defined in the General Control and
Configuration portion of
Table 1
in Section 1, "Pin Descriptions".
.1. This value is measured driving a load of 20pF.
3.3
MDIO Interface
The Management Data Input/Output (MDIO) port complies with Clause 45 of the IEEE 802.3ae specification. A
representative MDIO driver/receiver is shown in
Figure 19
. MDIO uses an open drain driver with a pullup
resistor to 1.2V.
Representative MDIO Read and Write waveforms are shown in
Figure 20
. The XRS10L120 samples MDIO on
the rising edge of MDC for input and drives MDIO after the rising edge of MDC for output. Note that setup,
hold, and output timings are defined from the maximum v
IL
and minimum V
IH
levels.
T
ABLE
4: CMOS I/O S
PECIFICATIONS
N
AME
D
ESCRIPTION
M
IN
N
OM
M
AX
U
NITS
t
DR
/t
DF,CMOS
CMOS input signal rise/fall times (20% - 80%)
0.2
-
5
ns
t
QR
/t
QF,CMOS
1 CMOS output signal rise/fall times (20% - 80%)
0.2
-
5
ns
V
IL,CMOS
CMOS input low voltage
-0.3
0
0.36
V
V
IH,CMOS
CMOS input high voltage
0.8
2.5
2.8
V
I
OL,CMOS
Output current for VOL = 0.2V
4.0
-
20
mA
dI
OL
/dt,
CMOS
Output current rate of change
-10
-
10
mA/ns
L
I,CMOS
CMOS I/O inductance
-
-
8
nH
C
I,CMOS
CMOS I/O capacitance
-
-
5
pF
F
IGURE
19. R
EPRESENTATIVE
MDIO C
IRCUIT
Open Drain
Driver
To other MDIO Devices
Pin
1.2V
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