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參數(shù)資料
| 型號： | XC3S1000-4CPG132C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Spartan-3 FPGA Family: Complete Data Sheet |
| 中文描述： | FPGA, 192 CLBS, 50000 GATES, PBGA132 |
| 封裝： | LEAD FREE, CSP-132 |
| 文件頁數(shù)： | 2/198頁 |
| 文件大小： | 1605K |
| 代理商： | XC3S1000-4CPG132C |
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DS099-1 (v1.4) January 17, 2005
Preliminary Product Specification
www.xilinx.com
1
2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Introduction
The Spartan-3 family of Field-Programmable Gate Arrays
is specifically designed to meet the needs of high volume,
cost-sensitive consumer electronic applications. The
eight-member family offers densities ranging from 50,000 to
five million system gates, as shown in
Table 1
.
The Spartan-3 family builds on the success of the earlier
Spartan-IIE family by increasing the amount of logic
resources, the capacity of internal RAM, the total number of
I/Os, and the overall level of performance as well as by
improving
clock
management
enhancements derive from state-of-the-art Virtex-II tech-
nology. These Spartan-3 enhancements, combined with
advanced process technology, deliver more functionality
and bandwidth per dollar than was previously possible, set-
ting new standards in the programmable logic industry.
Because of their exceptionally low cost, Spartan-3 FPGAs
are ideally suited to a wide range of consumer electronics
applications, including broadband access, home network-
ing, display/projection and digital television equipment.
The Spartan-3 family is a superior alternative to mask pro-
grammed ASICs. FPGAs avoid the high initial cost, the
lengthy development cycles, and the inherent inflexibility of
conventional ASICs. Also, FPGA programmability permits
design upgrades in the field with no hardware replacement
necessary, an impossibility with ASICs.
functions.
Numerous
Features
Very low cost, high-performance logic solution for
high-volume, consumer-oriented applications
-
Densities as high as 74,880 logic cells
Table 1:
Summary of Spartan-3 FPGA Attributes
-
Three power rails: for core (1.2V), I/Os (1.2V to
3.3V), and auxiliary purposes (2.5V)
SelectIO signaling
-
Up to 784 I/O pins
-
622 Mb/s data transfer rate per I/O
-
18 single-ended signal standards
-
6 differential I/O standards including LVDS, RSDS
-
Termination by Digitally Controlled Impedance
-
Signal swing ranging from 1.14V to 3.45V
-
Double Data Rate (DDR) support
Logic resources
-
Abundant logic cells with shift register capability
-
Wide multiplexers
-
Fast look-ahead carry logic
-
Dedicated 18 x 18 multipliers
-
JTAG logic compatible with IEEE 1149.1/1532
SelectRAM hierarchical memory
-
Up to 1,872 Kbits of total block RAM
-
Up to 520 Kbits of total distributed RAM
Digital Clock Manager (up to four DCMs)
-
Clock skew elimination
-
Frequency synthesis
-
High resolution phase shifting
Eight global clock lines and abundant routing
Fully supported by Xilinx ISE development system
-
Synthesis, mapping, placement and routing
MicroBlaze processor, PCI, and other cores
Pb-free packaging options
Low-power
Spartan-3L
Spartan-3 XA Family options
Family
and
Automotive
06
Spartan-3 FPGA Family:
Introduction and Ordering
Information
Preliminary Product Specification
DS099-1 (v1.4) January 17, 2005
0
0
R
Device
XC3S50
2
XC3S200
2
XC3S400
2
XC3S1000
2
,
3
XC3S1500
3
XC3S2000
XC3S4000
3
XC3S5000
System
Gates
50K
200K
400K
1M
1.5M
2M
4M
5M
Equivalent
Logic Cells
1,728
4,320
8,064
17,280
29,952
46,080
62,208
74,880
CLB Array
(One CLB = Four Slices)
Rows Columns Total CLBs
16
12
24
20
32
28
48
40
64
52
80
64
96
72
104
80
Distributed
RAM (bits
1
)
12K
30K
56K
120K
208K
320K
432K
520K
Block RAM
(bits
1
)
72K
216K
288K
432K
576K
720K
1,728K
1,872K
Dedicated
Multipliers
4
12
16
24
32
40
96
104
DCMs
2
4
4
4
4
4
4
4
Maximum
User I/O
124
173
264
391
487
565
712
784
Maximum
Differential
I/O Pairs
56
76
116
175
221
270
312
344
192
480
896
1,920
3,328
5,120
6,912
8,320
Notes:
1.
2.
3.
By convention, one Kb is equivalent to 1,024 bits.
These devices are available in Xilinx Automotive versions as described in
DS314
: Spartan-3 Automotive XA FPGA Family.
XC3S1000, XC3S1500, and XC3S4000 are also available in lower static power versions as described in
DS313
: Spartan-3L Low Power FPGA Family.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC3S1000-4CPG132I | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4PQ208C | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4PQ208I | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4PQG208C | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4PQG208I | Spartan-3 FPGA Family: Complete Data Sheet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3S1000-4CPG132I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4FG1156C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA Family : Complete Data Sheet |
| XC3S1000-4FG1156I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3 FPGA |
| XC3S1000-4FG320C | 制造商:Xilinx 功能描述:FPGA SPARTAN-3 1M GATES 17280 CELLS 630MHZ 1.2V 320FBGA - Trays |
| XC3S1000-4FG320I | 制造商:Xilinx 功能描述:FPGA SPARTAN-3 1M GATES 17280 CELLS 630MHZ 1.2V 320FBGA - Trays |
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