
Spartan-3 FPGA Family: Pinout Descriptions
76
www.xilinx.com
DS099-4 (v1.6) January 17, 2005
Product Specification
R
FG900: 900-lead Fine-pitch Ball Grid
Array
The 900-lead fine-pitch ball grid array package, FG900,
supports three different Spartan-3 devices, including the
XC3S2000, the XC3S4000, and the XC3S5000. The foot-
prints for the XC3S4000 and XC3S5000 are identical, as
shown in
Table 37
and
Figure 16
. The XC3S2000, however,
has fewer I/O pins which consequently results in 68 uncon-
nected pins on the FG900 package, labeled as “N.C.” In
Table 37
and
Figure 16
, these unconnected pins are indi-
cated with a black diamond symbol (
).
All the package pins appear in
Table 37
and are sorted by
bank number, then by pin name. Pairs of pins that form a dif-
ferential I/O pair appear together in the table. The table also
shows the pin number for each pin and the pin type, as
defined earlier.
If there is a difference between the XC3S2000 pinout and
the pinout for the XC3S4000 and XC3S5000, then that dif-
ference is highlighted in
Table 37
. If the table entry is
shaded, then there is an unconnected pin on the XC3S2000
that maps to a user-I/O pin on the XC3S4000 and
XC3S5000.
An electronic version of this package pinout table and foot-
print diagram is available for download from the Xilinx web-
site at
http://www.xilinx.com/bvdocs/publications/s3_pin.zip
.
Pinout Table
Table 37:
FG900 Package Pinout
Bank
XC3S2000
Pin Name
XC3S4000
XC3S5000
Pin Name
FG900
Pin
Number
Type
0
0
0
0
0
0
0
0
IO
IO
IO
IO
IO
IO/VREF_0
IO/VREF_0
IO_L01N_0/
VRP_0
IO_L01P_0/
VRN_0
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L03P_0
IO_L04N_0
IO_L04P_0
IO_L05N_0
IO_L05P_0/
VREF_0
IO
IO
IO
IO
IO
IO/VREF_0
IO/VREF_0
IO_L01N_0/
VRP_0
IO_L01P_0/
VRN_0
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L03P_0
IO_L04N_0
IO_L04P_0
IO_L05N_0
IO_L05P_0/
VREF_0
E15
K15
D13
K13
G8
F9
C4
B4
I/O
I/O
I/O
I/O
I/O
VREF
VREF
DCI
0
A4
DCI
0
0
0
0
0
0
0
0
B5
A5
D5
E6
C6
B6
F6
F7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L13N_0
IO_L13P_0
IO_L14N_0
IO_L14P_0
IO_L15N_0
IO_L15P_0
IO_L16N_0
IO_L16P_0
IO_L17N_0
IO_L17P_0
IO_L18N_0
IO_L18P_0
IO_L19N_0
IO_L19P_0
IO_L20N_0
IO_L20P_0
IO_L21N_0
IO_L21P_0
IO_L22N_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0/
VREF_0
IO_L27N_0
IO_L27P_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L13N_0
IO_L13P_0
IO_L14N_0
IO_L14P_0
IO_L15N_0
IO_L15P_0
IO_L16N_0
IO_L16P_0
IO_L17N_0
IO_L17P_0
IO_L18N_0
IO_L18P_0
IO_L19N_0
IO_L19P_0
IO_L20N_0
IO_L20P_0
IO_L21N_0
IO_L21P_0
IO_L22N_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0/
VREF_0
IO_L27N_0
IO_L27P_0
D7
C7
F8
E8
D8
C8
B8
A8
J9
H9
G10
F10
C10
B10
J10
K11
H11
G11
F11
E11
D11
C11
B11
A11
K12
J12
H12
G12
F12
E12
D12
C12
B12
A12
J13
H13
F13
E13
B13
A13
K14
J14
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF
0
0
G14
F14
I/O
I/O
Table 37:
FG900 Package Pinout
(Continued)
Bank
XC3S2000
Pin Name
XC3S4000
XC3S5000
Pin Name
FG900
Pin
Number
Type