
WM8768
Production Data
w
PD Rev 4.1 March 2005
32
L/RDAX[7:0]
00(hex)
01(hex)
:
:
:
FE(hex)
FF(hex)
ATTENUATION LEVEL
-
∞
dB (mute)
-127.5dB
:
:
:
-0.5dB
0dB
Table 16 Digital Volume Control Attenuation Levels
SOFTWARE REGISTER RESET
Writing to register 11111 will cause a register reset, resetting all register bits to their default values.
This reset will last either 2*MCLK periods or until another write is made to the serial interface.
REGISTER MAP
The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The
WM8768 can be configured using the Control Interface. All unused bits should be set to ‘0’.
REGISTER
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
R0(00h)
0
0
0
0
0
0
0
UPDATE
LDA1[7:0]
011111111
R1(01h)
0
0
0
0
0
0
1
UPDATE
RDA1[7:0]
011111111
R2(02h)
0
0
0
0
0
1
0
PL[8:5]
IZD
ATC
PDWN
All DAC
DEEMP
ALL DAC
MUTE
All DAC
100100000
R3(03h)
0
0
0
0
0
1
1
PHASE[8:6]
DACIWL[5:4]
DACBCP
DACLRP
DACFMT[1:0]
000000000
R4(04h)
0
0
0
0
1
0
0
UPDATE
LDA2[7:0]
011111111
R5(05h)
0
0
0
0
1
0
1
UPDATE
RDA2[7:0]
011111111
R6(06h)
0
0
0
0
1
1
0
UPDATE
LDA3[7:0]
011111111
R7(07h)
0
0
0
0
1
1
1
UPDATE
RDA3[7:0]
011111111
R8(08h)
0
0
0
1
0
0
0
UPDATE
MASTDA[7:0]
011111111
R9(09h)
0
0
0
1
0
0
1
DEEMP[8:6]
DMUTE[5:3]
DZFM[2:1]
ZCD
000000000
R10(0Ah)
0
0
0
1
0
1
0
DACRATE[8:6]
DACMS
PWRDN
ALL
DACD[3:1]
0
010000000
R12(0Ch)
0
0
0
1
1
0
0
0
0
MPD
0
0
0
0
0
0
000000000
R13(0Dh)
0
0
0
1
1
0
1
UPDATE
LDA4[7:0]
011111111
R14(0Eh)
0
0
0
1
1
1
0
UPDATE
RDA4[7:0]
011111111
R15(0Fh)
0
0
0
1
1
1
1
0
0
0
MPD
DEEMP
4
RESET
PHASE4 DMUTE
4
DZFM4
DACD4
000000000
R31(1Fh)
0
0
1
1
1
1
1
000000000