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參數(shù)資料
| 型號： | WM8768 |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | 24-bit, 192kHz 8-Channel DAC |
| 中文描述： | 24位，192kHz的8通道DAC |
| 文件頁數(shù)： | 15/38頁 |
| 文件大?。?/td> | 393K |
| 代理商： | WM8768 |
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Production Data
WM8768
w
PD Rev 4.1 March 2005
15
In hardware mode (MODE pin set high) the MUTE pin becomes a bi-directional pin. Therefore if it is
driven low the device will never softmute. If it is driven high then all channels will softmute
immediately.
However if the pin is connected to a high impedance, or left floating, then when all four internal zero
flags are raised. the WM8768 will also drive a weak logic high signal on the MUTE pin (output
impedance 10kOhms) which can be used to drive an external device.
It is not possible to perform analogue mute in Hardware mode.
Figure 10 MUTE Logic in Hardware Mode
INPUT FORMAT SELECTION
In hardware mode, ML/I2S and MC/IWL become input controls for selection of input data format type
and input data word length for the DAC.
ML/I2S
0
0
1
1
MC/IWL
0
1
0
1
INPUT DATA MODE
24-bit right justified
20-bit right justified
16-bit I
2
S
24-bit I
2
S
Table 8 Input Format Selection
Note:
In 24 bit I
2
S mode, any width of 24 bits or less is supported provided that the left/right clocks
(LRCLK) are high for a minimum of 24 bit clocks (BCLK) and low for a minimum of 24 bit clocks. If
exactly 32 bit clocks occur in one left/right clock (16 high, 16 low) the chip will auto detect and run a
16 bit data mode.
DE-EMPHASIS CONTROL
In hardware mode, the MD/DM pin becomes an input control for selection of de-emphasis filtering to
be applied.
MD/DM
0
1
DE-EMPHASIS
Off
On
Table 9 De-emphasis Control
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