參數(shù)資料
型號: WM8768
廠商: Wolfson Microelectronics
英文描述: 24-bit, 192kHz 8-Channel DAC
中文描述: 24位,192kHz的8通道DAC
文件頁數(shù): 21/38頁
文件大小: 393K
代理商: WM8768
Production Data
WM8768
w
PD Rev 4.1 March 2005
21
DAC OUTPUT CONTROL
The DAC output control word determines how the left and right inputs to the audio Interface are
applied to the left and right DACs:
REGISTER ADDRESS
0000010
DAC Control
BIT
8:5
LABEL
PL[3:0]
DEFAULT
1001
DESCRIPTION
Left
Output
Mute
PL[3:0]
Right
Output
Mute
0000
0001
Left
Mute
0010
Right
Mute
0011
(L+R)/2
Mute
0100
Mute
Left
0101
Left
Left
0110
Right
Left
0111
(L+R)/2
Left
1000
Mute
Right
1001
Left
Right
1010
Right
Right
1011
(L+R)/2
Right
1100
Mute
(L+R)/2
1101
Left
(L+R)/2
1110
Right
(L+R)/2
1111
(L+R)/2
(L+R)/2
DAC DIGITAL AUDIO INTERFACE CONTROL REGISTER
Interface format is selected via the FMT[1:0] register bits:
REGISTER ADDRESS
0000011
Interface Control
BIT
1:0
LABEL
FMT
[1:0]
DEFAULT
00
DESCRIPTION
Interface format Select
00 : right justified mode
01: left justified mode
10: I
2
S mode
11: DSP Modes A or B
In left justified, right justified or I
2
S modes, the LRP register bit controls the polarity of LRCLK. If this
bit is set high, the expected polarity of LRCLK will be the opposite of that shown Figure 13, Figure 14
and Figure 15. Note that if this feature is used as a means of swapping the left and right channels, a
1 sample phase difference will be introduced. In DSP modes, the LRP register bit is used to select
between modes A and B.
REGISTER ADDRESS
0000011
Interface Control
BIT
2
LABEL
LRP
DEFAULT
0
DESCRIPTION
In left/right/I
2
S modes:
LRCLK Polarity (normal)
0 : normal LRCLK polarity
1: inverted LRCLK polarity
In DSP mode:
0 : DSP mode A
1: DSP mode B
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