
Production Data
WM8768
w
PD Rev 4.1 March 2005
29
POWERDOWN MODE AND DAC DISABLE
Setting the PDWN register bit immediately powers down the DACs on the WM8768, overriding the
DACD powerdown bits control bits. All trace of the previous input samples is removed, but all control
register settings are preserved. When PDWN is cleared the digital filters will be reinitialised
REGISTER ADDRESS
0000010
Powerdown Control
BIT
2
LABEL
PDWN
DEFAULT
0
DESCRIPTION
Power Down all DAC’s Select:
0: All DACs enabled
1: All DACs disabled
The DACs may also be powered down individually by setting the DACPD disable bits. Each Stereo
DAC channel has a separate disable DACPD[2:0]. Setting DACPD for a channel will disable the
DACs and select a low power mode.
REGISTER ADDRESS
0001010
Powerdown Control
0001111
DAC4 Control
BIT
3:1
LABEL
DACD[2:0]
DEFAULT
000
DESCRIPTION
DAC Disable
1
DACD4
0
DAC 4 Powerdown
{DACD4,DACD [2:0]}
DAC
CHANNEL 4
Active
Active
Active
Active
Active
Active
Active
Active
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE
DISABLE
DAC
CHANNEL 3
Active
Active
Active
Active
DISABLE
DISABLE
DISABLE
DISABLE
Active
Active
Active
Active
DISABLE
DISABLE
DISABLE
DISABLE
DAC
CHANNEL 2
Active
Active
DISABLE
DISABLE
Active
Active
DISABLE
DISABLE
Active
Active
DISABLE
DISABLE
Active
Active
DISABLE
DISABLE
DAC
CHANNEL 1
Active
DISABLE
Active
DISABLE
Active
DISABLE
Active
DISABLE
Active
DISABLE
Active
DISABLE
Active
DISABLE
Active
DISABLE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 15 DAC Disable Control
MASTER POWERDOWN
Control bit PWRDNALL overrides the {DACD4,DACD[2:0]} bits and powers everything down
including the reference VMID. It is recommended that the DACs are powered down first before
setting this bit.
REGISTER ADDRESS
0001010
Interface Control
BIT
4
LABEL
PWRDNALL
DEFAULT
0
DESCRIPTION
Master Power down bit
0: Not powered down
1: Powered down