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參數(shù)資料
| 型號： | WED9LC6416V1612BC |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA153 |
| 封裝： | MO-163, BGA-153 |
| 文件頁數(shù)： | 4/27頁 |
| 文件大?。?/td> | 370K |
| 代理商： | WED9LC6416V1612BC |
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12
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
WED9LC6416V
January 2001
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
2
Write with
L
H
BA
Row Address
Bank Activate
ILLEGAL
2
Auto Precharge
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
No Operation; Bank(s) idle after tRP
L
H
BA
Row Address
Bank Activate
ILLEGAL
2
Precharging
L
H
L
BA
Column
Write w/o Precharge
ILLEGAL
2
L
H
L
H
BA
Column
Read w/o Precharge
ILLEGAL
20
L
H
L
X
Burst Termination
No Operation; Bank(s) idle after tRP
L
H
X
No Operation
No Operation; Bank(s) idle after tRP
H
X
Device Deselect
No Operation; Bank(s) idle after tRP
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
2
L
H
BA
Row Address
Bank Activate
ILLEGAL
2
Row Activating
L
H
L
BA
Column
Write
ILLEGAL
2
L
H
L
H
BA
Column
Read
ILLEGAL
2
L
H
L
X
Burst Termination
No Operation; Row active after tRCD
L
H
X
No Operation
No Operation; Row active after tRCD
H
X
Device Deselect
No Operation; Row active after tRCD
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
2
L
H
BA
Row Address
Bank Activate
ILLEGAL
2
Write Recovering
L
H
L
BA
Column
Write
Start Write; Determine if Auto Precharge
6
L
H
L
H
BA
Column
Read
Start Read; Determine if Auto Precharge
6
L
H
L
X
Burst Termination
No Operation; Row active after tDPL
L
H
X
No Operation
No Operation; Row active after tDPL
H
X
Device Deselect
No Operation; Row active after tDPL
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
2
Write Recovering
L
H
BA
Row Address
Bank Activate
ILLEGAL
2
with Auto
L
H
L
BA
Column
Write
ILLEGAL
2,6
Precharge
L
H
L
H
BA
Column
Read
ILLEGAL
2,6
L
H
L
X
Burst Termination
No Operation; Precharge after tDPL
L
H
X
No Operation
No Operation; Precharge after tDPL
H
X
Device Deselect
No Operation; Precharge after tDPL
SDRAM CURRENT STATE TRUTH TABLE (cont.)
Current State
Command
Action
Notes
SDCE
SDRAS
SDCAS
SDWE
(BA)
A11-A0
Description
A12 & A13
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| WED9LC6416V1612BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
| WED9LC6416V2010BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
| WED9LC6416V2010BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
| WED9LC6416V2012BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
| WED9LC6416V2012BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128Kx32 SSRAM/4Mx32 SDRAM |
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