參數(shù)資料
型號: WED9LC6416V1612BC
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA153
封裝: MO-163, BGA-153
文件頁數(shù): 18/27頁
文件大小: 370K
代理商: WED9LC6416V1612BC
25
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
WED9LC6416V
January 20001
FIG. 16
SDRAM MODE REGISTER SET CYCLE
Ra
Key
DQ
New Command
New
Command
Auto Refresh
MRS
012
34
56
0
1
2
3
4
5
6
7
8
9
10
DON'T CARE
tRFC
HI-Z
Note 2
Note 1
Note 3
SDRAS
SDCAS
ADDR
BWE
SDCLK
SDCE
SDWE
*Both banks precharge should be completed before Mode Register Set cycle and Auto refresh cycle.
NOTES:
MODE REGISTER SET CYCLE
1. SDCE, SDRAS, SDCAS & SDWE activation at the same clock cycle with address key will set internal mode register.
2. Minimum 2 clock cycles should be met before new SDRAS activation.
3. Please refer to Mode Register Set Table.
SDRAM AUTO REFRESH CYCLE
HIGH
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