參數(shù)資料
型號(hào)： W19B320BTT-H
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝： TSOP-48
文件頁(yè)數(shù)： 39/56頁(yè)
文件大?。?/td> 0K
代理商： W19B320BTT-H
W19B320BT/B DATASHEET
Publication Release Date:Dec.25, 2007
- 44 -
Revisionv A3
8.12 Alternate #CE Controlled Erase and Program Operations
70 ns
PARAMETER
SYM.
Min.
Typical
(Note3)
Max.
(Note4)
Unit
Write Cycle Time (Note 1)
TWC
70
-
ns
Address Setup Time
TAS
0
-
ns
Address Hold Time
TAH
45
-
ns
Data Setup Time
TDS
35
-
ns
Data Hold Time
TDH
0
-
ns
Read Recover Time Before Write (#OE High to
#WE Low)
TGHEL
0
-
ns
#WE Setup Time
TWS
0
-
ns
#WE Hold Time
TWH
0
-
ns
#CE Pulse Width
TCP
30
-
ns
#CE Pulse Width High
TCPH
30
-
ns
Byte
TPB
-
7
150
Programming Time (Note 6)
Word
TPW
-
9
210
μs
Byte
Accelerated Programming Time
(Note 6)
Word
TACCP
-
4
120
μs
Sector Erase Time (Note 2)
TSE
-
0.4
15
sec
Chip Erase Time (Note 2)
TCE
-
30
-
sec
Byte
TCPB
-
21
63
Chip Program Time (Note 5)
Word
TCPW
-
14
42
sec
Notes:
1. Not 100 % tested.
2. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
3. Typical program and erase time assume the following conditions :25℃,3.0 V VDD, 100,000 cycles .Additionally,
programming typicals assume checkerboard pattern.
4. Under worst case conditions of 90℃, VDD =2.7V, 100,000 cycles.
5. The typical chip programming time is considerably less than the maximun chip programming time listed,since most
bytes program faster than maximun program times listed.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command.
7. The device has a minimum erase and program cycle endurance of 100,000 cycles.
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