參數(shù)資料
型號: W19B320BTT-H
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝: TSOP-48
文件頁數(shù): 13/56頁
文件大?。?/td> 0K
代理商: W19B320BTT-H
W19B320BT/B DATASHEET
Publication Release Date:Dec.25, 2007
- 20 -
Revisionv A3
6.3.7
DQ3: Sector Erase Timer
After writing a sector erasure command sequence, the system may read DQ3 to determine whether erasure
has begun or not. (The sector erase timer does not apply to the chip erase command.) The entire time-out
applies after each additional sector erasure command if additional sectors are selected for erasure. Once
the timeout period has completed, DQ3 switches from “0” to “1.” If the time between additional sector erase
commands from the system can be assumed to be less than 50
μs, the system need not monitor, DQ3 does
not need to be monitored. Please also refer to Sector Erase Command Sequence section.
After the sector erase command is written, the system should read the status of DQ7 (
#Data Polling) or
DQ6 (Toggle Bit I) to ensure that the device has accepted the command sequence, and then read DQ3. If
DQ3 is“1,” the Embedded Erase algorithm has begun; all further commands (except Erase Suspend) are
ignored until the erase operation is complete. If DQ3 is “0,” the device will accept additional sector erase
commands.
The system software should check the status of DQ3 before and following each subsequent sector erase
command to ensure the command has been accepted. If DQ3 is high on the second status check, the last
command might not have been accepted.
相關(guān)PDF資料
PDF描述
W24010T-70LL 128K X 8 STANDARD SRAM, 70 ns, PDSO32
W24L04S-70LI 512K X 8 STANDARD SRAM, 70 ns, PDSO32
W25P010AF-8 32K X 32 STANDARD SRAM, PQFP100
W25P020AD-7 64K X 32 STANDARD SRAM, 7 ns, PQFP100
W25P020AD-6 64K X 32 STANDARD SRAM, 6 ns, PQFP100
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