- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359396 > VMX51C900 (Electronic Theatre Controls, Inc.) Versa Mix 8051 MCU with LCD Controller and ADC PDF資料下載
參數(shù)資料
| 型號： | VMX51C900 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Versa Mix 8051 MCU with LCD Controller and ADC |
| 中文描述： | 8051反之亦然混合與LCD控制器和ADC的微控制器 |
| 文件頁數(shù)： | 28/55頁 |
| 文件大小： | 2395K |
| 代理商： | VMX51C900 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
VMX51C900
______________________________________________________________________________________________
www.ramtron.com
page 28 of 55
PWM outputs
The VMX51C900 includes 2 PWM outputs, PWMA and
PWMB.
PWM Registers - Port1 Configuration Register
The VMX51C900 PWM outputs are shared with
Port1’s I/Os. To activate the PWM output, the
corresponding bit in the P1IOCTRL register must be
set.
T
ABLE
24:
P
ORT
1
I/O
C
ONTROL
R
EGISTER
(P1IOCTRL,
9B
H
)
7
-
PWMBE
3
-
PWMAE
Bit
Mnemonic
7
6
PWMBE
5:3
-
2
PWMAE
1:0
-
6
5
-
1
-
4
-
0
-
2
Description
PWMB output enabled when set to 1
PWMA output enabled when set to 1
-
Description of PWMA Function
The PWMA channel is controlled by two SFR registers;
one for the PWM data and the other to control the
PWMA input clock, PWMACK.
PWMA Data Register
The PWMA data register is composed of two parts:
the upper 5 bits, which control the duty cycle of the
PWM output and the remaining 3 bits, which control
the narrow pulse generator (NPA), The NPA generates
narrow pulses among the PWMA 8-cycle frames. The
number of pulses generated in the frame cycle
corresponds to the values defined in the NPA bits. The
insertion of narrow pulses in the PWM frame cycles
enables a PWM resolution equivalent to 8 bits.
The following table describes the PWMA data register.
The PWMA.x bits determine the duty cycle of the
PWMA output waveform. The NPAx bits will generate
narrow pulses in the 8-cycle PWM frame.
T
ABLE
25:
PWMA
D
ATA
R
EGISTER
(PWMA)
–
SFR
A4
H
7
PWMA.4
PWMA.3
3
PWMA.0
Bit
Mnemonic
7:4
PWMA[4:0]
6
5
4
PWMA.2
1
NPA.1
PWMA.1
0
NPA.0
2
NPA.2
Description
Contents of PWM Data
Inserts Narrow Pulses in a 8-PWM-Cycle
Frame
3:0
NPA[3:0]
The table below displays the number of narrow pulses
generated in an 8-cycle frame versus the NPA number.
NPA[2:0]
Number of Narrow Pulses inserted in
an 8-cycle frame
1
2
3
4
5
6
7
8
000
001
010
011
100
101
110
111
PWMA Control Register
The table below describes the PWMA control register
which is used to control the frequency at which the
PWMA operates.
T
ABLE
26:
PWM
C
ONTROL
R
EGISTER
(PWMACTRL)
–
SFR
A3
H
7
6
5
4
Unused
Bit
Mnemonic
Description
7:2
Unused
-
1
PWMACK1
Input Clock Frequency Divider Bit 1
0
PWMACK0
Input Clock Frequency Divider Bit 0
The following table shows the relationship between the
values of PWMACK1/PWMACK0 and the value of the
divider. Numerical values of the corresponding
frequencies are also provided.
PWMACK1
PWMACK0
Divider
3
2
1
0
PWMACK1
PWMACK0
PWM clock,
Fosc=20MHz
10MHz
5MHz
2.5MHz
1.25MHz
0
0
1
1
0
1
0
1
2
4
8
16
The following formulas can be used to calculate the
PWMA output frequency and the PWMA frame rate.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VN0104 | N-Channel Enhancement-Mode Vertical DMOS FET(擊穿電壓40V,N溝道增強(qiáng)型垂直DMOS結(jié)構(gòu)場效應(yīng)管) |
| VN0104 | N-Channel Enhancement-Mode Vertical DMOS FET |
| VN0104N3 | N-Channel Enhancement-Mode Vertical DMOS FET |
| VN0109NE | N-Channel Enhancement-Mode Vertical DMOS Power FETs Quad Array |
| VN0116ND | TRANSISTOR | MOSFET | N-CHANNEL | 160V V(BR)DSS | CHIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VMX51C900-25-L | 功能描述:8位微控制器 -MCU 8K+256 25MHz 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| VMX51C900-25-LG | 功能描述:8位微控制器 -MCU 8K+256 25MHz 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| VMX51C900-25-L-G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Versa Mix 8051 MCU with LCD Controller and ADC |
| VMX51C900-25-P | 功能描述:8位微控制器 -MCU 8K+256 25MHz 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| VMX51C900-25-PG | 功能描述:8位微控制器 -MCU 8K+256 25MHz 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。