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參數(shù)資料
| 型號： | UPD7554AGA |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 28/64頁 |
| 文件大?。?/td> | 991K |
| 代理商： | UPD7554AGA |
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28
μ
PD7554A, 7554A(A)
3.3
CANCELLING THE STANDBY MODE
(1) Cancelling the STANDBY mode by test request flag
As well as the STOP mode and HALT mode, the STANDBY mode is canceled when the test request flag (INTT
RQF or INT0/S RQF) is set in the mode. The program starts executing the instruction that follows the HALT instruction
that follows the STOP or HALT instruction.
Cancellation of the HALT mode does not affect the content of any register or the data memory, that is retained
in the mode.
(2) Cancelling the STANDBY mode by RESET input
RESET input unconditionally cancels the STANDBY mode as well as nthe STOP mode and HALT mode.
Fig. 3-1 shows the STANDBY mode cancel timing.
Fig. 3-1 STANDBY Mode Cancel Timing by RESET Input
RESET
STOP/HALT
STOP/HALT Mode
Operating
Mode
Instruction
Cancellation
Normal Reset Operation
(Starting from address 0)
The STANDBY mode is maintained while the RESET input is being active (high). When the RESET input goes low,
the STANDBY mode is cancelled and the CPU starts to execute the program from address 0 after a normal reset
operation.
Note that RESET input does not affect the content of the data memory that is retained in the STANDBY mode,
however, the contents of the other registers become undefined on cancellation of the mode.
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