
10
μ
PD75238
1.2 NON-PORT PINS (2/2)
Note
The circuits enclosed in circles have a Schmitt-triggered input.
Function
Pin name
I/O
P13
P20
P22
P23
P01
P02
P03
P00
P10
P11
P12
P81
P82
P83
–
P90-P93
–
–
–
–
–
–
P80
–
–
–
External event pulse input for timer/event counter #0 and
event counter #1.
Timer/event counter output
Clock output
Fixed frequency output (for buzzer or system clock trimming)
Serial clock I/O
Serial data output or serial bus I/O
Serial data input or serial bus I/O
Edge detection vectored interrupt input (Either a rising or
falling edge is detected.)
Serial clock I/O
Serial data output
Serial data input
Analog input to A/D converter
Power supply for A/D converter
A/D converter reference voltage input
A/D converter reference GND
Connection to a crystal/ceramic resonator for main system
clock generation. When external clock is used, it is input to
X1, and its inverted signal is input to X2.
Connection to a crystal resonator for subsystem clock
generation. When external clock is used, it is input to XT1,
and XT2 is left open.
System reset input
Timer/pulse generator pulse output
Positive power supply
GND potential
Pull-down resistor connection for the FIP controller/driver,
or power supply
TI0
PTO0
PCL
BUZ
SCK0
SO0/SB0
SI0/SB1
INT4
INT0
INT1
INT2
SCK1
SO1
SI1
AN0-AN3
AN4-AN7
AV
DD
AV
REF
AV
SS
X1, X2
XT1
XT2
RESET
PPO
V
DD
(3 pins)
V
SS
(2 pins)
V
LOAD
When reset
B
- C
E - B
E - B
E - B
F
- A
F
- B
M - C
B
B
- C
B
- C
F
E
B
Y
Y - A
–
Z
–
–
–
B
–
–
–
–
–
Input
Input
Input
Input
Input
Input
–
–
–
Input
Input
Input
–
–
–
–
–
–
–
Input
–
–
–
Edge detection vectored interrupt input
(The edge to be detected is selectable.)
Edge detection testable input
(An rising edge is detected.)
Synchronous
Asynchronous
Asynchronous
Also
used as
I/O
Note
circuit
type
I
O
O
O
I/O
I/O
I/O
I
I
I
I/O
O
I
I
–
I
–
I
I
–
I
O
–
–
–