
29
μ
PD75237
Fig. 3-2 Program Memory Map
Note
As stated above, the interrupt vector start address is 14 bits in length, and should therefore be set in the
16K space (0000H to 3FFFH).
Remarks
In all cases other than those listed above, branch to the address with only the lower 8 bits of the PC
changed is enabled by BR PCDE and BR PCXA instructions.
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
INTBT/INT4 Start Address
Internal Reset Start Address (Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
INT0 Start Address
INTCSI0 Start Address
INTT0 Start Address
INTTPG Start Address
INTKS Start Address
INT1 Start Address
GETI Instruction Reference Table
0002H
0004H
0006H
0008H
000AH
000CH
000EH
0000H
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
5F7FH
CALLF
!faddr
Instruction
Entry Address
BRCB
!caddr
Instruction
Branch Address
BR !addr
Instruction
Branch Address
CALL !addr
Instruction
Branch Address
Branch/call
Address
by GETI
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address
BRA !addr1
Instruction
Branch Address
CALLA !addr1
Instruction
Branch Address
BR $addr1
Instruction
Relative Branch
Address
(-15 to -1 and
+2 to +16)
3FFFH
4000H
4FFFH
5000H
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address