參數(shù)資料
型號(hào): UPD75048GC
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 51/68頁(yè)
文件大?。?/td> 538K
代理商: UPD75048GC
51
μ
PD75048
SERIAL TRANSFER OPERATION
Two-Line and Three-Line Serial I/O Modes (SCK: internal clock output)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK Cycle Time
t
KCY1
V
DD
= 4.5 to 6.0 V
1600
3800
t
KCY1
/2-50
t
KCY1
/2-150
ns
ns
ns
ns
SCK High-, Low-Level
Widths
t
KL1
t
KH1
V
DD
= 4.5 to 6.0 V
SI Set-Up Time (vs. SCK
)
t
SIK1
t
KSI1
t
KSO1
150
400
ns
ns
ns
SI Hold Time (vs. SCK
)
SCK
↓→
SO Output
Delay Time
R
L
= 1k
, C
L
= 100pF*
V
DD
= 4.5 to 6.0V
250
1000
ns
TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: external clock input)
Parameter
Symbol
t
KCY2
Conditions
MIN.
800
3200
400
TYP.
MAX.
Unit
ns
ns
ns
SCK Cycle Time
V
DD
= 4.5 to 6.0V
SCK High-, Low-Level
Widths
t
KL2
V
DD
= 4.5 to 6.0V
t
KH2
t
SIK2
t
KSI2
1600
100
400
ns
ns
ns
SI Set-Up Time (vs. SCK
)
SI Hold Time (vs. SCK
)
SCK
↓→
SO Output
Delay Time
t
KSO2
R
L
= 1k
, C
L
= 100 pF*
V
DD
= 4.5 to 6.0V
300
1000
ns
ns
*: R
L
and C
L
are load resistance and load capacitance of the SO output line.
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