46
μ
PD75048
MAIN SYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS
(T
a
= -10 to +70
°
C, V
DD
= 2.7 to 6.0 V)
Oscillator
Recommended
Constants
Item
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
Oscillation
frequency(f
X
)*
1
Oscillation stabiliza- After V
DD
come to
tion time*
2
V
DD
= oscillation
voltage range
2.0
5.0*
3
MHz
MIN. value of
oscillation voltage
range
4
ms
Crystal
Oscillation
frequency (f
X
)*
1
2.0
4.19
5.0*
3
MHz
Oscillation stabiliza- V
DD
= 4.5 to 6.0 V
tion time*
2
10
ms
30
ms
External Clock
X1 input frequency
(f
X
)*
1
X1 input high-,
low-level widths
(t
XH
, t
XL
)
2.0
5.0*
3
MHz
100
250
ns
*1: Only to express the characteristics of the oscillator circuit. For instruction execution time, refer
to AC Characteristics.
2: Time required for oscillation to stabilize after V
DD
has reached the minimum volue of the oscillation
voltage range or the STOP mode has been released.
3: When the oscillation frequency is 4.19 MHz
<
fx
≤
5.0 MHz, do not select PCC = 0011 as the
instruction execution time: otherwise, one machine cycle is set to less than 0.95
μ
s, falling short
of the rated minimum value of 0.95
μ
s.
Note
: When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted
line in the figures as follows to avoid adverse influences on the wiring capacity:
Keep the wiring length as short as possible.
Do not cross the wiring over the other signal lines.
Do not route the wiring in the vicinity of lines through which a high alternating current flows.
Always keep the ground point of the capacitor of the oscillator circuit at the same potential
as V
DD
. Do not connect the ground pattern through which a high curent flows.
Do not extract signals from the oscillation circuit.
X1
X2
PD74HCU04
m
X1
X2
C1
C2
V
DD
X1
X2
C1
C2
V
DD
#