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參數(shù)資料
| 型號： | UM_S3C49F9X |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | S3C49F9X User’s Manual |
| 中文描述： | S3C49F9X用戶手冊 |
| 文件頁數(shù)： | 49/74頁 |
| 文件大?。?/td> | 653K |
| 代理商： | UM_S3C49F9X |
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S3C49F9X SOLID DISK CONTROLLER CARD CONFIGURATION
48
4.10.10 Device Control Register (Address –3F6[376]; Offset Eh):
This register is used to control the PC Card interrupt request and to issue an ATA soft reset to the card.
This register can be written even if the device is BUSY. The bits are defined as follows:
D7
×
D6
×
D5
×
D4
×
D3
D2
D1
D0
1
SW Rst
-IEn
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2(SW Rst)
This bit set to 1 in order to force the PC Card to perform an AT Disk controller Soft Reset
operation. This does not change the PCMCIA Card Configuration Registers (4.3.2-to 4.3.5) as hardware
Reset does. The Card remains in Reset until this bit is reset to "0".
Bit 1
The Interrupt Enable bit enables interrupts when the bit is 0 (-IEn=0), interrupts from the
PC Card are disable. This bit also controls the Int bit in the Configuration and Status Register. This bit is
set to 1 at power on and Reset.
Bit 0
This bit ignored by the PC Card
.
This bit is an X (don't care).
This bit is an X (don't care).
This bit is an X (don't care).
This bit is an X (don't care).
This bit is ignored by the PC Card.
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