參數(shù)資料
型號: TSPC860SRMZPU50D4
廠商: E2V TECHNOLOGIES PLC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC PROCESSOR, PBGA357
封裝: PLASTIC, BGA-357
文件頁數(shù): 17/90頁
文件大小: 2351K
代理商: TSPC860SRMZPU50D4
24
TSPC860
2129A–HIREL–08/02
PD[8]
TXD4
W17
Bidirectional
General-Purpose I/O Port D Bit 8 — Bit 8 of the general-purpose I/O
port D.
TXD4 — Transmit data for serial channel 4.
PD[7]
RTS3
T15
Bidirectional
General-Purpose I/O Port D Bit 7 — Bit 7 of the general-purpose I/O
port D.
RTS3 — Active low request to send output indicates that SCC3 is
ready to transmit data.
PD[6]
RTS4
V16
Bidirectional
General-Purpose I/O Port D Bit 6 — Bit 6 of the general-purpose I/O
port D.
RTS4 — Active low request to send output indicates that SCC4 is
ready to transmit data.
PD[5]
REJECT2
U15
Bidirectional
General-Purpose I/O Port D Bit 5 — Bit 5 of the general-purpose I/O
port D.
REJECT2 — This input to SCC2 allows a CAM to reject the current
Ethernet frame after it determines the frame address did not match.
PD[4]
REJECT3
U16
Bidirectional
General-Purpose I/O Port D Bit 4 — Bit 4 of the general-purpose I/O
port D.
REJECT3 — This input to SCC3 allows a CAM to reject the current
Ethernet frame after it determines the frame address did not match.
PD[3]
REJECT4
W16
Bidirectional
General-Purpose I/O Port D Bit 3 — Bit 3 of the general-purpose I/O
port D.
REJECT4 — This input to SCC4 allows a CAM to reject the current
Ethernet frame after it determines the frame address did not match.
TCK
DSCK
Hi-Z (Pulled
up on rev 0 to
rev A.3)
H16
Input
Provides clock to scan chain logic or for the development port logic.
Should be tied to Vcc if JTAG or development port are not used.
TMS
Pulled up
G18
Input
Controls the scan chain test mode operations. Should be tied to
power through a pull-up resistor if unused.
TDI
DSDI
Pulled up (Hi-
Z on rev 0 to
rev A.3)
H17
Input
Input serial data for either the scan chain logic or the development
port and determines the operating mode of the development port at
reset.
TDO
DSDO
Low
G17
Output
Output serial data for either the scan chain logic or for the
development port.
Table 1. Signal Descriptions (Continued)
Name
Reset
Number
Type
Description
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