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Using the TPS40180 for Voltage Control Loop Master or Slave Operation
Connections Between Controllers for Stacking
SLVS753B – FEBRUARY 2007 – REVISED NOVEMBER 2007
The TPS40180 can function as a voltage loop master or as a voltage loop slave. As a voltage loop master, the
TPS40180 behaves like a standard control device in that it regulates its output using its internal error amplifier
and reference. As a voltage loop slave, the TPS40180 takes the VSH and COMP signals from a voltage loop
master and the slave converter becomes an output current booster to the master converter. Current is shared
between the master and slave since both the current command reference (VSH) and the current command
(COMP) are being distributed form the master controller and used by the slave to set its output current. The error
amplifier in the master is responsible for overall voltage regulation. The error amplifier on the slave is
disconnected when configured as a voltage control loop slave.
To configure a TPS40180 as a voltage loop slave, connect the SS pin to VDD or PVCC. It is important that the
SS pin not fall more than 1 V below the PVCC voltage when starting up as a slave. If this condition is no met, the
controller may not start. For this reason, it is not recommended to tie SS to BP5 to configure the converter as a
voltage control loop slave.
One of the main benefits of using the TPS40180 is the ability to parallel output power stages to achieve higher
output currents and to scale or stack on controllers as needed. Phasing information is also shared among the
controllers to minimize input ripple and RMS current in the input stage capacitors.
Figure 31 shows the
connections among the controller devices and the controller configuration connections to implement a single
output stacked configuration. Up to 7 slave controllers can be connected to the master controller in this manner
with unique phasing for each controller. More than 7 controllers can also be connected as long as some of them
are programmed to operate at the same phase relationship with respect to the master. Not shown are the power
stage portions of the schematics. The outputs of the individual converters inductors are simply connected
together and then to a common output capacitor bank. All other connections would be as for a single device used
as a converter.
In
Figure 31, the master controller is configured as a CLK master and as a voltage control loop master (SS and
RT pin connections). The slave controllers are configured as CLK slaves (RT pin tied to PVCC) and as voltage
control loop slaves (SS pin tied to PVCC).
Copyright 2007, Texas Instruments Incorporated
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