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BOOTSTRAP DIODE
The bootstrap diode provides the supply voltage for the UGATE driver by charging the bootstrap capacitor
connected between BOOT and PHASE pins from the input voltage VDD when the low-side FET is in ON state.
At the very initial stage when both power FETs are OFF, the bootstrap capacitor is pre-charged through this
path including the PHASE pin, output inductor and large output capacitor down to GND. The forward voltage
drop across the diode is only 1.0V at bias current 100 mA. This allows quick charge restore of the bootstrap
capacitor during the high-frequency operation.
UPPER AND LOWER GATE DRIVERS
The upper and lower gate drivers charge and discharge the input capacitance of the power MOSFETs to allow
operation at switching frequencies up to 2 MHz. The output stage consists of a P-channel MOSFET providing
source output current and an N-channel MOSFET providing sink current through the output stage. The ON state
resistances of these MOSFETs are optimized for the synchronous buck converter configuration working with low
duty cycle at the nominal steady state condition. The UGATE output driver is capable of propagating PWM input
puses of less than 30-ns while still maintaining proper dead time to avoid any shoot through current conditions.
The waveforms related to the narrow input PWM pulse operation are shown in
Figure 17
.
DEAD TIME CONTROL
The dead-time control circuit is critical for highest efficiency and no shoot through current operation througout
the whole duty cycle range with the different power MOSFETs. By sensing the output of driver going low, this
circuit does not allow the gate drive output of another driver to go high until the first driver output falls below the
specified threshold. This approach to control the dead time is called adaptive. The overall dead time also
includes the fixed portion to ensure that overlapping never exists. The typical dead time is around 14 ns,
although it varies over the driver internal tolerances, layout and external MOSFET parasitic inductances. The
proper dead time is maintained whenever the current through the output inductor of the power stage flows in the
forward or reverse direction. Reverse current could happen in a buck configuration during the transients or while
dynamically changing the output voltage on the fly, as some microprocessors require. Because the dead time
does not depend on inductor current direction, this driver can be used both in buck and boost regulators or in
any bridge configuration where the power MOSFETs are switching in a complementary manner. Keeping the
dead time at short optimal level boosts efficiency by 1% to 2% depending on the switching frequency. Measured
switching waveforms in one of the practical designs show 10-ns dead time for the rising edge of PHASE node
and 22 ns for the falling edge (
Figure 29
and
Figure 30
in the Application Section of the data sheet).
THERMAL SHUTDOWN
If the junction temperature exceeds 160
°
C, the thermal shutdown circuit will pull both gate driver outputs low and
thus turning both, low-side and high-side power FETs OFF. When the driver cools down below 140
°
C after a
thermal shutdown, then it resumes its normal operation and follows the PWM input and EN/PG signals from the
external control circuit. While in thermal shutdown state, the internal MOSFET pulls the EN/PG pin low, thus
setting a flag indicating the driver is not ready to continue normal operation. Normally the driver is located close
to the MOSFETs, and this is usually the hottest spots on the PCB. Thus, the thermal shutdown feature of
TPS28225 can be used as an additional protection for the whole system from overheating.
TPS28225
SLUS710–MAY 2006
DETAILED DESCRIPTION (continued)
Large non-optimal dead time can cause duty cycle modulation of the dc-to-dc converter during the operation
point where the output inductor current changes its direction right before the turn ON of the high-side MOSFET.
This modulation can interfere with the controller operation and it impacts the power stage frequency response
transfer function. As the result, some output ripple increase can be observed. The TPS28225 driver is designed
with the short adaptive dead time having fixed delay portion that eliminates risk of the effective duty cycle
modulation at the described boundary condition.
17
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