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參數資料
| 型號： | TMS320UVC5409 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | Fixed-Point Digital Signal Processor(定點DSP) |
| 中文描述： | 定點數字信號處理器（定點DSP）的 |
| 文件頁數： | 10/35頁 |
| 文件大小： | 443K |
| 代理商： | TMS320UVC5409 |
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TMS320UVC5409
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS102 – APRIL 1999
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
on-chip ROM with bootloader (continued)
The standard on-chip ROM layout is shown in Table 1.
Table 1. Standard On-Chip ROM Layout
ADDRESS RANGE
DESCRIPTION
0x0000h – 0xBFFFh
External program space
0xC000h – 0xF7FFh
Reserved
0xF800h – 0xFBFFh
Bootloader
0xFC00h – 0xFEFFh
Reserved
0xFF00h – 0xFF7Fh
Built-in self test
0xFF80h – 0xFFFFh
Interrupt vector table
In the ’UVC5409 ROM, 128 words are reserved for factory device-testing purposes. Application
code to be implemented in on-chip ROM must reserve these 128 words at addresses
FF00h–FF7Fh in program space.
on-chip RAM
The ’UVC5409 device contains 32K
×
16-bit of on-chip dual-access RAM (DARAM). The DARAM is composed
of four blocks of 8K words each. Each block in the DARAM can support two reads in one cycle, or a read and
a write in one cycle. The DARAM is located in the address range 0080h–7FFFh in data space, and can be
mapped into program/data space by setting the OVLY bit to one.
A
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