參數(shù)資料
型號(hào): TMS320UVC5402
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: Fixed-Point Digital Signal Processor(定點(diǎn)DSP)
中文描述: 定點(diǎn)數(shù)字信號(hào)處理器(定點(diǎn)DSP)的
文件頁(yè)數(shù): 19/60頁(yè)
文件大小: 772K
代理商: TMS320UVC5402
TMS320UVC5402
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS100A – APRIL 1999 – REVISED AUGUST 1999
19
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
DMA memory map
The DMA memory map is shown in Figure 6 to allow DMA transfers to be unaffected by the status of the MPMC,
DROM, and OVLY bits.
FFFF
Reserved
4000
3FFF
Hex
0000
005F
0060
On-Chip DARAM
(16K x 16-bit)
Scratch-Pad
RAM
Undefined
0080
007F
Figure 6. ’UVC5402 DMA Memory Map
DMA priority level
Each DMA channel can be independently assigned high priority or low priority relative to each other. Multiple
DMA channels that are assigned to the same priority level are handled in a round-robin manner.
DMA source/destination address modification
The DMA provides flexible address-indexing modes for easy implementation of data management schemes
such as autobuffering and circular buffers. Source and destination addresses can be indexed separately and
can be postincremented, postdecremented, or postincremented with a specified index offset.
DMA in autoinitialization mode
The DMA can automatically reinitialize itself after completion of a block transfer. Some of the DMA registers can
be preloaded for the next block transfer through the DMA global reload registers (DMGSA, DMGDA, and
DMGCR). Autoinitialization allows:
Continuous operation:
Normally, the CPU would have to reinitialize the DMA immediately after the
completion of the current block transfer; but with the global reload registers, it can reinitialize these values
for the next block transfer any time after the current block transfer begins.
Repetitive operation:
The CPU does not preload the global reload register with new values for each block
transfer but only loads them on the first block transfer.
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