參數(shù)資料
型號(hào): TMS320F206PZA
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-Bit Digital Signal Processor
中文描述: 16位數(shù)字信號(hào)處理器
文件頁數(shù): 37/57頁
文件大?。?/td> 793K
代理商: TMS320F206PZA
TMS320F206
DIGITAL SIGNAL PROCESSOR
SPRS050A – NOVEMBER 1996 – REVISED APRIL 1998
37
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
VLOAD
IOL
CT
IOH
Output
Under
Test
50
Where:
IOL
IOH
VLOAD
CT
=
=
=
=
2 mA (all outputs)
300
μ
A (all outputs)
1.5 V
60-pF typical load-circuit capacitance
Figure 3. Test Load Circuit
signal-transition levels
The data in this section is shown for the 5-V version (’x20x). Note that some of the signals use different reference
voltages, see the recommended operating conditions table. TTL-output levels are driven to a minimum
logic-high level of 2.4 V and to a maximum logic-low level of 0.6 V.
Figure 4 shows the TTL-level outputs.
0.6 V
20%
2.4 V
80%
Figure 4. TTL-Level Outputs
TTL-output transition times are specified as follows:
For a high-to-low transition the level at which the output is said to be no longer high is below 80% of the
total voltage range and lower and the level at which the output is said to be low is 20% of the total voltage
range and lower.
For a low-to-high transition the level at which the output is said to be no longer low is 20% of the total voltage
range and higher and the level at which the output is said to be high is 80% of the total voltage range and
higher.
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