參數(shù)資料
型號(hào)： TLC320AD52C
廠商： Texas Instruments, Inc.
英文描述： Sigma-Delta Analog Interface Circuits With Master-Slave Function(帶主從功能的∑△模擬接口電路,高分辨率信號(hào)轉(zhuǎn)換)
中文描述： sigma - delta模擬接口電路的主從功能（帶主從功能的Σ△模擬接口電路，高分辨率信號(hào)轉(zhuǎn)換）
文件頁(yè)數(shù)： 10/59頁(yè)
文件大小： 306K
代理商： TLC320AD52C
1–4
1.4
Ordering Information
PACKAGE
TA
SMALL OUTLINE
PLASTIC DIP
(DW)
QUAD FLAT PACK
(PT)
0
°
C to 70
°
C
TLC320AD50CDW
TLC320AD52CDW
TLC320AD50CPT
TLC320AD52CPT
–40
°
C to 85
°
C
TLC320AD50IDW
TLC320AD50IPT
1.5
Terminal Functions
TERMINAL
NO.
PT
ALTDATA
17
NAME
I/O
DESCRIPTION
DW
14
I
Alternate data. ALTDATA signals are routed to DOUT during secondary
communication if phone mode is enabled using control 2 register.
AUXM
48
4
I
Inverting input to auxiliary analog input. AUXM requires an external single-pole
antialias filter with a low output impedance and should be tied to VSS if not used.
Noninverting input to auxiliary analog input. AUXP requires an external
single-pole antialias filter with a low output impedance and should be tied to VSS
if not used.
AUXP
47
3
I
AVDD
AVDD(PLL)
AVSS
AVSS(PLL)
DIN
37
25
I
Analog ADC power supply (5 V only)
5
7
I
Analog power supply for the internal PLL (5 V only)
39
26
I
Analog ground
7
8
I
Analog ground for the internal PLL
15
12
I
Data input. DIN receives the DAC input data and register data from the external
DSP (digital signal processor) and is synchronized to SCLK and FS. Data is
latched at the falling edge of SCLK when FS is low. DIN is at high impedance
when FS is not active.
DOUT
14
11
O
Data output. DOUT transmits the ADC output bits and register data, and is
synchronized to SCLK. Data is sent out at the rising edge of SCLK when FS is
low. DOUT is at high impedance when FS is not activated.
DVDD
DVSS
FC
11
9
I
Digital power supply (5 V or 3 V)
12
10
I
Digital ground
23
17
I
Hardware secondary communication request. When FC is set to high, a
secondary communication, followed by the primary communication, will occur to
transfer AIC register data between AIC and DSP. FC is sampled and latched on
the rising edge of FS at the end of the primary serial communication. See section
3 for details.
FILT
43
28
O
Bandgap filter. FILT is provided for decoupling of the bandgap reference, and
provides 3.2 V. The optimal capacitor value is 0.1
μ
F (ceramic). This voltage node
should be loaded only with a high-impedance dc load.
FLAG
16
13
O
Output flag. During phone mode, FLAG contains the value set in control 2
register.
FS
27
20
I/O
Frame sync. When FS goes low, DIN begins receiving data bits and DOUT
begins transmitting data bits. In master mode, FS is internally generated and is
low during the data transmission into DIN and out from DOUT. In slave mode, FS
is externally generated.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLC320AD52CDW 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
TLC320AD52CPT 功能描述:IC ANALOG INTERFACE W/MS 48-LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):- 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應(yīng)商設(shè)備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱:296-21257-2
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TLC320AD535C 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC
TLC320AD535C-I 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC
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