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參數(shù)資料
| 型號(hào)： | TDA8757CHV/21 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, SOT-612-1, HLQFP-144 |
| 文件頁數(shù)： | 5/38頁 |
| 文件大?。?/td> | 894K |
| 代理商： | TDA8757CHV/21 |
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Philips Semiconductors
TDA8757C
Triple 8-bit ADC 205 Msps
Preliminary data
Rev. 01 — 14 August 2002
13 of 38
9397 750 10111
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
8.2.1
Variable gain ampliers
Three independent variable gain ampliers are used to provide, for each channel, a
full-scale input signal to the 8-bit ADC. The gain adjustment range is designed so that
for an input range varying from 0.4 to 1.2 V (p-p), the output signal corresponds to the
ADC full-scale input of 1 V (p-p).
To ensure that the gain does not vary over the whole operating temperature range a
reference voltage Vref = 2.5 V (DC), with a maximum variation of 100 ppm/°C, is
supplied externally on pin VREF.
The calibration of the gains is done using the following principle. When an input pulse
is applied to pin HSYNC, an internal multiplexer switches from the RGB video signals
to a reference voltage (1
16Vref). The ADCs inputs become this reference signal and
the three corresponding outputs are compared to pre-set values loaded in three 7-bit
registers: COARSER, COARSEG and COARSEB. Depending on the result of the
comparisons, the three gains are adjusted such that the ADC outputs become equal
to the pre-set values in the registers. The three gains are controlled by changing the
values in the COARSE registers.
The signal supplied on pin HSYNC, may be selected active HIGH or active LOW. The
choice is done through the serial interface by setting bit ‘Hlevel’ in the control register
(active HIGH when bit Hlevel = 0).
This active part of the signal has to occur during the blanking period of the signal in
order not to interrupt the active video. Normally the horizontal synchronization signal,
provided by the video source, is connected to pin HSYNC.
The values loaded in the gain registers (COARSER, COARSEG, COARSEB) are
chosen from 68 values (see Table 6).
Fig 6.
Clamp denition.
video signal
CLP
Clamp
=
+128
Clamp
=
+64
Clamp
=
63.5
Clamp
= 0
0
constant level
255
constant level
FCE698
clamp
programming
ADC
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8757HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Triple 8-bit ADC 170 Msps |
| TDA8758 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:YC 8-bit low-power analog-to-digital video interface |
| TDA8758G | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:YC 8-bit low-power analog-to-digital video interface |
| TDA8759HV/8/C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 3X8-BITS VIDEO ADC 110MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TDA8759HV/8/C1,551 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 3X8-BITS VIDEO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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