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參數(shù)資料
| 型號： | TDA8295HN/C2 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 接收器 |
| 英文描述： | AM/FM, AUDIO/VIDEO DEMODULATOR, PQCC40 |
| 封裝： | 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT618-1, HVQFN-40 |
| 文件頁數(shù)： | 49/83頁 |
| 文件大?。?/td> | 3440K |
| 代理商： | TDA8295HN/C2 |
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9.3.21 Special equalizer functions for group delay and video (CVBS)
To realize special customer demands or accurate compensation of the tuner influence, the TDA8295 has got freely
programmable equalizers for the group delay and video (CVBS) response.
In Table 66 the programming of the group delay equalizer is explained, in Table 68 the programming of the video equalizer.
For each equalizer type an example is given.
[1]
Don’t care if GD_EQ_CTRL = 0; see Table 25.
Example of Table 66: If e.g. a flat group delay response up to 4 MHz and
70 ns from 4.43 MHz to 5 MHz on the CVBS
signal is wanted, one might realize a characteristic like shown in Figure 12.
Table 66.
GD_EQ_SECTx_C1 and GD_EQ_SECTx_C2 (x = 1 to 4) register (address 4Bh to 52h) bit description
Legend: * = default value[1].
Address Register
Bit
Symbol
Access Value
Description
4Bh
GD_EQ_SECT1_C1 7 to 0 GD_EQ_SECT1_C1[7:0] R/W
00h*
The group delay equalizer consists of four cascaded all-pass Infinite Impulse
Response (IIR) sections of second order (8th order in sum). The transfer
function H(z) of one section is as follows, while the sampling rate is
13.5 MHz:
GD_EQ_SECTx_C1 and GD_EQ_SECTx_C2 (x = 1 to 4) are defining the
linear and square coefficient of each section, i.e. GD_EQ_SECTx_C1 = b1
and GD_EQ_SECTx_C2 = b2. The coefficients are in signed fixed-point
format, the representation is in two’s complement. There is one sign bit, one
magnitude bit and 6 fractional bits. Each fractional bit represents an inverse
power of two, so that the highest value for a coefficient is
20 + 21 + ... + 26 = 21
26 = 1.984375. The binary representation for this
value is 01.11 1111 (= 7Fh) and all bits except the sign bit are logic 1. As
two’s complement is chosen, the lowest value for a coefficient is
2, which is
10.00 0000 (= 80h) in the binary representation. So, for the lowest possible
value, only the sign bit is logic 1. The shown default values for
GD_EQ_SECTx_C1 and GD_EQ_SECTx_C2 (x = 1 to 4) implement a flat
equalizer response.
4Ch
GD_EQ_SECT1_C2 7 to 0 GD_EQ_SECT1_C2[7:0] R/W
00h*
4Dh
GD_EQ_SECT2_C1 7 to 0 GD_EQ_SECT2_C1[7:0] R/W
00h*
4Eh
GD_EQ_SECT2_C2 7 to 0 GD_EQ_SECT2_C2[7:0] R/W
00h*
4Fh
GD_EQ_SECT3_C1 7 to 0 GD_EQ_SECT3_C1[7:0] R/W
00h*
50h
GD_EQ_SECT3_C2 7 to 0 GD_EQ_SECT3_C2[7:0] R/W
00h*
51h
GD_EQ_SECT4_C1 7 to 0 GD_EQ_SECT4_C1[7:0] R/W
00h*
52h
GD_EQ_SECT4_C2 7 to 0 GD_EQ_SECT4_C2[7:0] R/W
00h*
Hz
()
b
2
b
1
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z 1
–
z
2
–
+
×
1b
1
z
1
–
×
b
2
z
2
–
×
++
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=
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8296 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital global standard low IF demodulator for analog TV and FM radio |
| TDA8296HN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital global standard low IF demodulator for analog TV and FM radio |
| TDA8296HN/C1,518 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA8296HN/C1,551 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA8296HN/C1,557 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
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