參數(shù)資料
型號: TDA8295HN/C2
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: AM/FM, AUDIO/VIDEO DEMODULATOR, PQCC40
封裝: 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT618-1, HVQFN-40
文件頁數(shù): 30/83頁
文件大?。?/td> 3440K
代理商: TDA8295HN/C2
TDA8295_C2_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 November 2009
36 of 83
NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
9.3.11 CVBS settings
Table 34.
CVBS_SET register (address 1Dh) bit description
Legend: * = default value.
Bit
Symbol
Access Value
Description
7 to 4 -
R/W
-
not used
3
CVBS_EQ_
CTRL
R/W
video equalizer mode control
0*
mode using predefined settings like described in
1
free programmable mode; for details see Section 9.3.21
2
FOR_BLK
R/W
when active, the video output is always blanked, e.g. for
channel change (forced blank)
0*
no action
1
video blanked
1
AUTO_BLK
R/W
when active, the video output is blanked if the horizontal
line lock flag (N_H_LOCK, see Table 44) is not present
0*
auto-blanking off
1
auto-blanking on
0
VID_LVL
R/W
the video levelling stage ensures a constant and clipping
free video output level (important for excessive picture
carrier overmodulation)
0
video levelling stage off
1*
video levelling stage on
Table 35.
CVBS_LEVEL register (address 1Eh) bit description
Legend: * = default value.
Bit
Symbol
Access Value
Description
7 to 0 CVBS_LVL[7:0] R/W
With this byte, the nominal video output level is freely
programmable. The format is unsigned integer (offset
binary). Settings below 40h and above C0h, which
correspond to
5 dB (40h) and +4.5 dB (C0h) related to
the default value, are forbidden. In the following some
possible settings in 1 dB steps are shown.
51h
3 dB nominal
5Bh
2 dB nominal
66h
1 dB nominal
73h*
nominal: 1 V (p-p) video output level (sync-peak)
81h
+1 dB nominal
91h
+2 dB nominal
A2h
+3 dB nominal
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