- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98199 > TDA8295HN/C2 (NXP SEMICONDUCTORS) AM/FM, AUDIO/VIDEO DEMODULATOR, PQCC40 PDF資料下載
參數(shù)資料
| 型號(hào)： | TDA8295HN/C2 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 接收器 |
| 英文描述： | AM/FM, AUDIO/VIDEO DEMODULATOR, PQCC40 |
| 封裝： | 6 X 6 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT618-1, HVQFN-40 |
| 文件頁(yè)數(shù)： | 40/83頁(yè) |
| 文件大?。?/td> | 3440K |
| 代理商： | TDA8295HN/C2 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)當(dāng)前第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)
TDA8295_C2_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 November 2009
45 of 83
NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
9.3.17 ADC control
In the TDA8295 a 12-bit ADC is implemented sampling with a 54 MHz clock (27 MHz
optional).
Table 51.
ADC_CTL register (address 33h) bit description
Legend: * = default value.
Bit
Symbol
Access Value
Description
7
GAINSET R/W
The track and hold circuit in the converter has a
programmable gain setting, which is controlled by the
GAINSET parameter. In case the gain of the track and hold is
increased, the input range of the ADC is decreased
accordingly.
0*
2.0 V (p-p)
1
1.0 V (p-p) (6 dB gain)
6 to 4 CS[2:0]
R/W
The current consumption of the ADC has to be programmed
with these three bits.
000
not allowed
001
not allowed
010*
not allowed
011
not allowed
100
1.00 (value to be programmed differing from default value)
101
1.25
110
1.50
111
not allowed
3
DCIN
R/W
The input signal of the ADC can be either AC coupled by
means of two capacitors or connected directly to the inputs
(DC coupled).
0*
AC coupling
1
DC coupling
2
TWOS
R/W
This parameter controls the output format of the ADC.
0
offset binary format
1*
twos complement format
1
SLEEP
R/W
When HIGH, SLEEP sets the ADC into its Sleep mode. Both
bias current and clock are switched off. In this mode, the
current consumption is reduced by a factor of 6. The
reference circuit will remain active in order to guarantee a fast
recovery from Sleep mode.
0*
Normal mode
1
ADC Sleep mode
0
PD_ADC
R/W
When HIGH, PD_ADC sets the ADC into its Power-down
mode. All internal currents are switched off. In this mode, the
current consumption is near zero (leakage current only).
0*
Normal mode
1
ADC Power-down mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA8310AN | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| TDA8310N | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| TDA8315T-T | COLOR SIGNAL DECODER, PDSO24 |
| TDA8315TD | COLOR SIGNAL DECODER, PDSO24 |
| TDA8362N | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8296 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital global standard low IF demodulator for analog TV and FM radio |
| TDA8296HN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital global standard low IF demodulator for analog TV and FM radio |
| TDA8296HN/C1,518 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA8296HN/C1,551 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA8296HN/C1,557 | 功能描述:調(diào)節(jié)器/解調(diào)器 DIGITAL GLOBAL IF DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。