參數(shù)資料
型號： TAS5711PHPR
廠商： Texas Instruments
文件頁數(shù)： 28/66頁
文件大?。?/td> 0K
描述： IC AMP AUD DGTL 20W 2CH 48HTQFP
標(biāo)準(zhǔn)包裝： 1
類型： D 類
輸出類型： 2 通道（立體聲，2.1）或 4 通道（四路）
在某負(fù)載時最大輸出功率 x 通道數(shù)量： 21W x 2 @ 8 歐姆
電源電壓： 8 V ~ 26 V
特點： 消除爆音，數(shù)字輸入，I²C，I²S，靜音，短路和熱保護，關(guān)機，音量控制
安裝類型： 表面貼裝
供應(yīng)商設(shè)備封裝： 48-HTQFP（7x7）
封裝/外殼： 48-TQFP 裸露焊盤
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面： 860 (CN2011-ZH PDF)
其它名稱： 296-25564-6
CH1_audio
CH2_audio
CH3_audio
CH2_audio
PWM1
PWM2
PWM3
PWM4
2.0 BTL AD
0x20 (23) = 0
0x20 (19) = 0
0x05 (3) = X
0x05 (2) = 0
Reg setting
2.0 BTL BD
0x20 (23) = 1
0x20 (19) = 1
0x05 (3) = X
0x05 (2) = 0
Reg setting
2.1 SE, BTL-AD
0x20 (23) = 0
0x20 (19) = 0
0x05 (3) = 0
0x05 (2) = 1
Reg setting
2.1 SE, BTL-BD
0x20 (23) = 0
0x20 (19) = 0
0x05 (3) = 1
0x05 (2) = 1
Reg setting
A
B
C
D
B0378-01
SLOS600A – DECEMBER 2009 – REVISED AUGUST 2010
www.ti.com
Output Mode and MUX Selection
Figure 51. Output Mode and MUX Selection
2.1-Mode Support
The TAS5711 uses a special mid-Z ramp sequence to reduce click and pop in SE-mode and 2.1-mode
operation.To enable the mid-Z ramp, register 0x05 bit D7 must be set to 1. To enable 2.1 mode, register 0x05 bit
D2 must be set to 1. The SSTIMER pin should be left floating in this mode.
Single-Filter PBTL-Mode Support
The TAS5711 supports parallel BTL (PBTL) mode with OUT_A/OUT_B (and OUT_C/OUT_D) connected before
the LC filter. In order to put the part in PBTL configuration, drive PBTL (pin 8) HIGH. This synchronizes the
turnoff of half-bridges A and B (and similarly C/D) if an overcurrent condition is detected in either half-bridge.
There is a pulldown resistor on the PBTL pin that configures the part in BTL mode if the pin is left floating.
PWM output multiplexers should be updated to set the device in PBTL mode. Output Mux Register (0x25) should
be written with a value of 0x01 10 32 45. Also, the PWM shutdown register (0x19) should be written with a value
of 0x3A.
34
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5711
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