參數(shù)資料
型號: STPCATLAS
廠商: 意法半導(dǎo)體
英文描述: X86 Core PC Compatible System-on-Chip for Terminals
中文描述: x86內(nèi)核PC兼容系統(tǒng)上的終端芯片
文件頁數(shù): 64/111頁
文件大?。?/td> 1896K
代理商: STPCATLAS
ELECTRICAL SPECIFICATIONS
64/111
Issue 1.0 - July 24, 2002
4.5.10 VGA INTERFACE
Table 4-19
lists the AC characteristics of the VGA
interface.
4.5.11 TFT INTERFACE
Table 4-20
lists the AC characteristics of the TFT
interface.
Table 4-19. Graphics Adapter (VGA) AC Timing
Name
Parameter
DCLK (input) Cycle Time
DCLK (input) High Time
DCLK (input) Low Time
DCLK (input) Rising Time
DCLK (input) Falling Time
DCLK (input) to R,G,B valid
DCLK (input) to HSYNC valid
DCLK (input) to VSYNC valid
DCLK (input) to COL_SEL valid
DCLK (output) Cycle Time
DCLK (output) High Time
DCLK (output) Low Time
DCLK (output) to R,G,B valid
DCLK (output) to HSYNC valid
DCLK (output) to VSYNC valid
DCLK (output) to COL_SEL valid
Min
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 4-20. TFT Interface Timings
Name
Parameters
DCLK (input) to R[5:0], G[5:0], B[5;0]
DCLK (input) to FPLINE
DCLK (input) to FPFRAME
DCLK (output) to R[5:0], G[5:0], B[5;0]
DCLK (output) to FPLINE
DCLK (output) to FPFRAME
Min
Max
Units
nS
nS
nS
nS
nS
nS
15
15
15
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