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參數(shù)資料
| 型號(hào)： | STPC CONSUMER |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Multimedia PC on a Chip(多媒體PC) |
| 中文描述： | 多媒體電腦芯片（多媒體個(gè)人電腦） |
| 文件頁數(shù)： | 20/34頁 |
| 文件大小： | 388K |
| 代理商： | STPC CONSUMER |
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PIN DESCRIPTION
20/34
2.2.11 X-Bus Interface pins / IDE Data
RMRTCCS# / DD[15]
ROM/Real Time clock chip
select. This pin is a multi-function pin. When
ISAOE# is active, this signal is used as RM-
RTCCS#. This signal is asserted if a ROM access
is decoded during a memory cycle. It should be
combined with MEMR# or MEMW# signals to
properly access the ROM. During a IO cycle, this
signal is asserted if access to the Real Time Clock
(RTC) is decoded. It should be combined with IOR
or IOW# signals to properly access the real time
clock.
When ISAOE# is inactive, this signal is used as
IDE DD[15] signal.
This signal must be ORed externally with ISAOE#
and is then connected to ROM and RTC. An
LS244 or equivalent function can be used if OE# is
connected to ISAOE# and the output is provided
with a weak pull-up resistor.
KBCS# / DD[14]
Keyboard Chip Select.This pin
is a multi-function pin. When ISAOE# is active,
this signal is used as KBCS#. This signal is assert-
ed if a keyboard access is decoded during a I/O
cycle.
When ISAOE# is inactive, this signal is used as
IDE DD[14] signal.
This signal must be ORed externally with ISAOE#
and is then connected to keyboard. An LS244 or
equivalent function can be used if OE# is connect-
ed to ISAOE# and the output is provided with a
weak pull-up resistor.
RTCRW# / DD[13]
Real Time Clock RW. This pin
is a multi-function pin. When ISAOE# is active,
this signal is used as RTCRW#. This signal is as-
serted for any I/O write to port 71H.
When ISAOE# is inactive, this signal is used as
IDE DD[13] signal.
This signal must be ORed externally with ISAOE#
and then connected to the RTC. An LS244 or
equivalent function can be used if OE is connect-
ed to ISAOE# and the output is provided with a
weak pull-up resistor.
RTCDS# / DD[12]
Real Time Clock DS This pin is
a multi-function pin. When ISAOE# is active, this
signal is used as RTCDS. This signal is asserted
for any I/O read to port 71H.
When ISAOE# is inactive, this signal is used as
IDE DD[12] signal.
This signal must be ORed externally with ISAOE#
and is then connected to RTC. An LS244 or equiv-
alent function can be used if OE# is connected to
ISAOE# and the output is provided with a weak
pull-up resistor.
RTCAS#
Real time clock address strobe.This sig-
nal is asserted for any I/O write to port 70H.
2.2.12 Monitor Interface
RED, GREEN, BLUE
RGB Video Outputs.These
are the 3 analog color outputs from the RAMDACs
VSYNC
Vertical Synchronisation Pulse. This is
the vertical synchronization signal from the VGA
controller.
HSYNC
Horizontal Synchronisation Pulse.This is
the horizontal synchronization signal from the
VGA controller.
VREF_DAC
DAC Voltage reference. An external
voltage reference is connected to this pin to bias
the DAC.
RSET
Resistor Current Set.This is reference cur-
rent input to the RAMDAC is used to set the full-
scale output of the RAMDAC.
COMP
Compensation.This is the RAMDAC com-
pensation pin. Normally, an external capacitor
(typically 10nF) is connected between this pin and
V
DD
to damp oscillations.
DDC[1:0]
Direct Data Channel Serial Link.These
bidirectional pins are connected to CRTC register
3Fh to implement DDC capabilities. They conform
to I
2
C electrical specifications, they have open-
collector output drivers which are internally con-
nected to V
DD
through pull-up resistors.
2.2.13 MISCELLANEOUS
SCAN_ENABLE
Reserved The pins are re-
served for Test and Miscellaneous functions)
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