- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98145 > ST7267C8T1/XXX (STMICROELECTRONICS) 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | ST7267C8T1/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, LEAD FREE, TQFP-48 |
| 文件頁數(shù)： | 110/189頁 |
| 文件大?。?/td> | 1643K |
| 代理商： | ST7267C8T1/XXX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁當(dāng)前第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁
ST7267C8 ST7267R8
27/189
ST7 POWER SAVING MODES (Cont’d)
5.3 HALT MODE
HALT mode is the lowest power consumption
mode. HALT mode is entered by executing the
HALT
instruction.
The
internal
oscillator
is
stopped, causing all internal processing to be
stopped, including the operation of the on-chip pe-
ripherals.
To further decrease the consumption (especially
for the Suspend mode):
– The internal regulator must be put in powerdown
mode by setting the REG_OFF bit of the CCMR
register.
– The active slew rate compensation cell of the IOs
must be stopped by setting the CPO bit of the
EOSCR register.
Entering HALT mode clears the I bits in the CC
register, enabling interrupts. If an interrupt is pend-
ing, the Device wakes up immediately. Not all in-
terrupts will wake up the Device from HALT, only
those listed in the Interrupt Mapping Table in the
Interrupt section allow wake-up.
Specific interrupts such as an external interrupt or
an USB end of suspend interrupt (as described in
Table 16) or a reset wakes up the Device from
HALT mode.
– If a reset is the wake-up event, the main oscilla-
tor is immediately turned on and a 512 CPU cy-
cle delay is used to stabilize the oscillator. After
the start up delay the device starts in Low power
mode and the CPU resumes operation by fetch-
ing the reset vector.
– If an interrupt is the wake-up event, the main os-
cillator is immediately turned on and a 512 CPU
cycle delay is used to stabilize the oscillator. Af-
ter the start up delay, if the device was in low
power mode before entering in halt mode the de-
vice starts in low power mode and the CPU
resumes operation. But if the device was in full
power mode before entering in halt, the opera-
tion are resumed only after the PLL lock
Refer to Figure 11 for more details.
5.3.1 HALT MODE RECOMMENDATIONS
– Make sure that an external event is available or
that the USB end of suspend interrupt is enabled
to wake up the Device from Halt mode.
– When using an external interrupt to wake up the
Device, reinitialize the corresponding I/O as “In-
put Pull-up with Interrupt” before executing the
HALT instruction. The main reason for this is that
the I/O may be wrongly configured due to exter-
nal interference or by an unforeseen logical con-
dition.
– For the same reason, reinitialize the level sensi-
tiveness of each external interrupt as a precau-
tionary measure.
– The opcode for the HALT instruction is 0x8E. To
avoid an unexpected HALT instruction due to a
program counter failure, it is advised to clear all
occurrences of the data value 0x8E from memo-
ry. For example, avoid defining a constant in
ROM with the value 0x8E.
– As the HALT instruction clears the I bits in the
CC register to allow interrupts, the user may
choose to clear all pending interrupt bits before
executing the HALT instruction. This avoids en-
tering other peripheral interrupt routines after ex-
ecuting the external interrupt routine
corresponding to the wake-up event (reset or ex-
ternal interrupt).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST72774S9T1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| ST72E734J6D0 | 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CDIP42 |
| ST72T774S9T1 | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| ST7294C6B6 | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP28 |
| ST72T94C6M6 | 8-BIT, OTPROM, MICROCONTROLLER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST72681/R12 | 制造商:STMicroelectronics 功能描述:CONTROLLER FOR HIGH-PERFORMANCE BUS-POWERED USB 2.0 FLASH DR - Trays |
| ST72681/S13 | 制造商:STMicroelectronics 功能描述:CONTROLLER FOR HIGH-PERFORMANCE - Trays |
| ST7271 | 制造商:Panasonic Industrial Company 功能描述:IC |
| ST7271N5B1-CLF | 制造商:STMicroelectronics 功能描述: |
| ST727X4-EMU2B | 制造商:STMicroelectronics 功能描述:REALTIME EMULATOR BOARD - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。