參數(shù)資料
型號(hào): ST10F252M-4T3
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件頁(yè)數(shù): 94/328頁(yè)
文件大?。?/td> 3111K
代理商: ST10F252M-4T3
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ST10F252M
CAN modules
Phase buffer segments and synchronisation
The phase buffer segments (Phase_Seg1 and Phase_Seg2) and the synchronisation jump
width (SJW) are used to compensate for the oscillator tolerance. The phase buffer segments
may be lengthened or shortened by synchronisation.
Synchronizations occur on edges from recessive to dominant, their purpose is to control the
distance between edges and sample points.
Edges are detected by sampling the actual bus level in each time quantum and comparing it
with the bus level at the previous sample point. A synchronisation may be done only if a
recessive bit was sampled at the previous sample point and if the actual time quantum’s bus
level is dominant.
An edge is synchronous if it occurs inside of Sync_Seg, otherwise the distance between
edge and the end of Sync_Seg is the edge phase error, measured in time quanta. If the
edge occurs before Sync_Seg, the phase error is negative, else it is positive.
Two types of synchronisation exist: hard synchronisation and resynchronisation. A hard
synchronisation is done once at the start of a frame; inside a frame only resynchronisations
occur.
Hard synchronisation
After a hard synchronisation, the bit time is restarted with the end of Sync_Seg,
regardless of the edge phase error. Thus hard synchronisation forces the edge which
has caused the hard synchronisation to lie within the synchronisation segment of the
restarted bit time.
Bit resynchronisation
Resynchronisation leads to a shortening or lengthening of the bit time such that the
position of the sample point is shifted with regard to the edge.
When the phase error of the edge which causes resynchronisation is positive,
Phase_Seg1 is lengthened. If the magnitude of the phase error is less than SJW,
Phase_Seg1 is lengthened by the magnitude of the phase error, else it is lengthened
by SJW.
When the phase error of the edge which causes resynchronisation is negative,
Phase_Seg2 is shortened. If the magnitude of the phase error is less than SJW,
Phase_Seg2 is shortened by the magnitude of the phase error, else it is shortened by
SJW.
When the magnitude of the phase error of the edge is less than or equal to the programmed
value of SJW, the results of hard synchronisation and resynchronisation are the same. If the
magnitude of the phase error is larger than SJW, the resynchronisation cannot compensate
the phase error completely, an error of (phase error - SJW) remains.
Only one synchronisation may be done between two sample points. The synchronisations
maintain a minimum distance between edges and sample points, giving the bus level time to
stabilize and filtering out spikes that are shorter than (Prop_Seg + Phase_Seg1).
Apart from noise spikes, most synchronisations are caused by arbitration. All nodes
synchronize “hard” on the edge transmitted by the “l(fā)eading” transceiver that started
transmitting first, but due to propagation delay times, they cannot become ideally
synchronized. The “l(fā)eading” transmitter does not necessarily win the arbitration, therefore
the receivers have to synchronize themselves to different transmitters that subsequently
“take the lead” and that are differently synchronized to the previously “l(fā)eading” transmitter.
The same happens at the acknowledge field, where the transmitter and some of the
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