參數(shù)資料
型號: SM65MLVD205AD
廠商: Texas Instruments, Inc.
英文描述: MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
中文描述: 多點LVDS線路驅(qū)動器和接收器
文件頁數(shù): 4/26頁
文件大?。?/td> 517K
代理商: SM65MLVD205AD
www.ti.com
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
SN65MLVD200A, SN65MLVD202A
SN65MLVD204A, SN65MLVD205A
SLLS573–DECEMBER 2003
PARAMETER
TEST CONDITIONS
MIN
(1)
TYP
(2)
MAX
UNIT
|V
AB
| or
|V
YZ
|
|V
AB
| or
|V
YZ
|
V
OS(SS)
Differential output voltage magnitude
480
650
mV
See
Figure 2
Change in differential output voltage magnitude
between logic states
Steady-state common-mode output voltage
Change in steady-state common-mode output
voltage between logic states
Peak-to-peak common-mode output voltage
–50
50
mV
0.8
1.2
V
V
OS(SS)
See
Figure 3
–50
50
mV
V
OS(PP)
V
Y(OC)
or
V
A(OC)
V
Z(OC)
or
V
B(OC)
V
P(H)
V
P(L)
I
IH
I
IL
|I
OS
|
150
mV
Maximum steady-state open-circuit output voltage
0
2.4
V
See
Figure 7
Maximum steady-state open-circuit output voltage
0
2.4
V
Voltage overshoot, low-to-high level output
Voltage overshoot, high-to-low level output
High-level input current (D, DE)
Low-level input current (D, DE)
Differential short-circuit output current magnitude
1.2 V
SS
V
V
μA
μA
mA
See
Figure 5
–0.2 V
SS
V
IH
= 2 V to V
CC
V
IL
= GND to 0.8 V
See Figure 4
–1.4 V
(V
or V
)
3.8 V,
Other output = 1.2 V
–1.4 V
(V
or V
Z
)
3.8 V, Other
output = 1.2 V, 0 V
V
CC
1.5 V
V
= 0.4 sin(30E6
π
t) + 0.5 V,
(3)
Other input at 1.2 V, driver
disabled
V
= 0.4 sin(30E6
π
t) V,
(3)
Driver disabled
0
0
10
10
24
I
OZ
High-impedance state output current (driver only)
–15
10
μA
I
O(OFF)
Power-off output current
–10
10
μA
C
Y
or C
Z
Output capacitance
3
pF
C
YZ
Differential output capacitance
2.5
pF
C
Y/Z
Output capacitance balance, (C
Y
/C
Z
)
0.99
1.01
(1)
(2)
(3)
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
All typical values are at 25
°
C and with a 3.3-V supply voltage.
HP4194A impedance analyzer (or equivalent)
4
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