參數(shù)資料
型號: SII1160
廠商: Silicon Image, Inc.
英文描述: CASE,HEAVY-DUTY POLY,201407, FOAM FILLED,w/HANDLE,BLACK
中文描述: PanelLink發(fā)射機
文件頁數(shù): 15/33頁
文件大?。?/td> 494K
代理商: SII1160
SiI
1160 PanelLink Transmitter
Data Sheet
11
SiI
-DS-0126-B
Feature Information
I
2
C Interface
The
SiI
1160 Tx provides an I
2
C slave interface for more precise control of the chip features. Use of this interface
is optional and is selected by the ISEL/RST pin. If not used, the chip register settings return to a default state; the
EDGE and PD features then come under the control of the respective strap pins instead.
The I
2
C slave state machine operates from an internal clock derived from the incoming SCL signal. No video
clock and input is required to read and write to the I
C registers from address 0x00 to 0x0F. These accesses can
also take place using only the SCL clock in power down mode.
The transmitter responds to the seven-bit binary I
2
C address of 0x70. A read or write transaction is determined by
bit 0 of the I
2
C address. Setting this bit to 0 will enable a write transaction and setting this bit to 1 will enable a
read transaction.
The I
2
C read operation is shown in Figure 9, and the write operation in Figure 10. Page mode is not supported.
S
A
C
K
S
A
C
K
A
C
K
P
Slave Address
Register Address
Slave Address
Data
S
S
S
Bus Activity :
Master
SDA
No
A
C
K
Figure 9. I
2
C Byte Read
S
A
C
K
A
C
K
P
Slave Address
Register Address
Data
S
S
Bus Activity :
Master
SDA
A
C
K
Figure 10. I
2
C Byte Write
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