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參數(shù)資料
| 型號(hào)： | SII1160 |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | CASE,HEAVY-DUTY POLY,201407, FOAM FILLED,w/HANDLE,BLACK |
| 中文描述： | PanelLink發(fā)射機(jī) |
| 文件頁(yè)數(shù)： | 14/33頁(yè) |
| 文件大?。?/td> | 494K |
| 代理商： | SII1160 |
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SiI
1160 PanelLink Transmitter
Data Sheet
SiI
-DS-0126-B
10
Reserved Pins
It is preferable to tie indicated pins HIGH through a 2-5K
resistor; direct connection to VCC is not
recommended.
Pin Name
RSVD
RSVD
RSVD
RSVD
Pin #
22
28
29
38
Type
In
In
In
--
Description
Reserved. Must be tied
HIGH
for normal operation.
Reserved. Must be tied
HIGH
for normal operation.
Reserved. Must be tied
HIGH
for normal operation.
Reserved. Should be left unconnected (but can be tied to AVCC for existing
Si
I
160 designs).
Power and Ground Pins
Pin Name
VCC
GND
IVCC
AVCC
AGND
PVCC1
PVCC2
PGND1
Pin #
8,30,56,88
7,31,57,67,79,89
17,66,81,98
36,44
33,37,41,47
18
85
19
Type
Power
Ground
Power
Power
Ground
Power
Power
Ground
Description
Digital Core VCC, must be set to 3.3V.
Digital Core GND.
Input VCC, must be set to 3.3V.
Analog VCC must be set to 3.3V.
Analog GND.
Primary PLL Analog VCC must be set to 3.3V.
Filter PLL Analog VCC must be set to 3.3V.
PLL Analog GND. PGND1 should not be directly
connected to PGND2 before being connected to the
GROUND plane. They should be connected individually
to the GROUND plane.
PLL Analog GND. PGND2 should not be directly
connected to PGND1 before being connected to the
GROUND plane. They should be connected individually
to the GROUND plane.
PGND2
86
Ground
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| SII1160CTU | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PanelLink Transmitter |
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| SII1161CT100 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PanelLink Receiver |
| SII1161CTU | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PanelLink Receiver |
| SII1162 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PanelLink Transmitter |
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