參數(shù)資料
型號(hào)： SI3232DCX-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 105/128頁
文件大小： 0K
描述： DAUGHTER CARD W/DISCRETE INTRFC
標(biāo)準(zhǔn)包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3232
已供物品： 板，CD
Si3232
78
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
Reset settings = 0x00
MSTRSTAT: Master Initialization Status (Register Address 3)
(Register type: Initialization/single value instance for both channels)
Bit
D7
D6D5D4D3
D2
D1
D0
Name
PLLFAULT FSFAULT PCFAULT
SRCLR
PLOCK
FSDET
FSVAL
PCVAL
Type
R/W
R
RRRR
Bit
Name
Function
7
PLLFAULT
PLL Lock Fault Status.
This bit is set when the PLOCK bit transitions low, indicating loss of PLL lock. Writing 1 to
this bit clears the status.
0 = PLL lock is valid.
1 = PLL has lost lock.
6FSFAULT
FSYNC Clock Fault Status.
This bit is set when the FSVAL and FSDET bits transition low, indicating loss of valid
FSYNC signal or invalid FSYNC-to-PCLK ratio. Writing 1 to this bit clears the status.
0 = Correct FSYNC to PCLK ration present.
1 = FSYNC to PCLK ratio lost.
5PCFAULT
PCM Clock Fault Status.
This bit will be set when the PCVAL bit transitions low. Writing 1 to this bit clears the status.
0 = Valid PCLK signal present.
1 = No valid PCLK signal present.
4SRCLR
SRAM Clear Status Detect.
0 = SRAM clear operation not initiated or in progress.
1 = SRAM clear operation has completed.
3PLOCK
PLL Lock Detect.
Indicates the internal PLL is locked relative to FSYNC.
0 = PLL has lost lock relative to FSYNC.
1 = PLL locked relative to FSYNC.
2
FSDET
FSYNC to PCLK Ratio Detect.
Indicates a valid FSYNC to PCLK ratio has been detected.
0 = Invalid FSYNC to PCLK ratio detected.
1 = Correct FSYNC to PCLK ratio present.
1FSVAL
FSYNC Clock Valid.
Indicates that a minimum valid FSYNC signal is present.
0 = FSYNC signal is not valid.
1 = FSYNC signal is present.
0PCVAL
PCM Clock Valid.
Indicates that a minimum valid PCLK signal is present.
0 = PCLK signal is
128 kHz.
1 = PCLK signal is
128 kHz.
相關(guān)PDF資料
PDF描述
M1AXK-3440K IDC CABLE - MSC34K/MC34F/X
SI3232PPT0-EVB BOARD EVAL W/SI3200 INTERFACE
UPZW6101MHD CAP ALUM 100UF 420V 20% RADIAL
SI3232DC0-EVB DAUGHTER CARD W/SI3200 INTERFACE
UPZ2D391MHD CAP ALUM 390UF 200V 20% RADIAL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI3232-FQ 功能描述:電信線路管理 IC DUAL CH SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3232-FQR 制造商:Silicon Laboratories Inc 功能描述:
SI3232-G-FQ 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3232-G-FQR 功能描述:電信線路管理 IC Dual-CH SLIC only Internal 65 Vrms RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3232-G-GQ 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*