參數(shù)資料
型號: SI3216MDC1-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 54/122頁
文件大小: 0K
描述: DAUGHTER CARD W/SI3201 INTERFACE
標準包裝: 1
Si3216
Rev. 1.0
37
Not
Recommended
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ew
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esi
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2.3.2. Oscillator Frequency and Amplitude
Each of the two-tone generators contains a two-pole
resonant
oscillator
circuit
with
a
programmable
frequency and amplitude. These two-tone generators
are programmed via indirect registers OSC1, OSC1X,
OSC1Y, OSC2, OSC2X, and OSC2Y. The sample rate
for the two oscillators is 16 kHz. The equations are as
follows:
coeffn =cos(2fn/16 kHz),
where fn is the frequency to be generated;
OSCn = coeffn x(2
15);
where desired Vrms is the amplitude to be generated;
OSCnY = 0,
n = 1 or 2 for oscillator 1 or oscillator 2, respectively.
For example, to generate a DTMF digit of 8, the two
required tones are 852 Hz and 1336 Hz. Assuming the
generation of half-scale values (ignoring twist) is
desired, the following values are calculated:
OSC1Y = 0
OSC2 = 0.86550 (215) = 28361 = 6EC8h
OSC2Y = 0
The above computed values are written to the
corresponding registers to initialize the oscillators. Once
the oscillators are initialized, the oscillator control
registers can be accessed to enable the oscillators and
direct their outputs.
2.3.3. Tone Generator Cadence Programming
Each of the two-tone generators contains two timers,
one for setting the active period and one for setting the
inactive period. The oscillator signal is generated during
the active period and suspended during the inactive
period. Both the active and inactive periods can be
programmed from 0 to 8 seconds in 125 s steps. The
active period time interval is set using OAT1 (direct
registers 36 and 37) for tone generator 1 and OAT2
(direct registers 40 and 41) for tone generator 2.
To enable automatic cadence for tone generator 1,
define the OAT1 and OIT1 registers and then set the
O1TAE bit (direct Register 32, bit 4) and O1TIE bit
(direct Register 32, bit 3). This enables each of the
timers to control the state of the Oscillator Enable bit,
O1E (direct Register 32, bit 2). The 16-bit counter
begins counting until the active timer expires, at which
time the 16-bit counter resets to zero and begins
counting until the inactive timer expires. The cadence
continues until the user clears the O1TAE and O1TIE
control bits. The zero crossing detect feature can be
implemented by setting the OZ1 bit (direct Register 32,
bit 5). This ensures that each oscillator pulse ends
without a dc component. The timing diagram in
Figure 21 is an example of an output cadence using the
zero crossing feature.
One-shot oscillation can be achieved by enabling O1E
and O1TAE. Direct control over the cadence can be
achieved by controlling the O1E bit (direct Register 32,
bit 2) directly if O1TAE and O1TIE are disabled.
The operation of tone generator 2 is identical to that of
tone generator 1 using its respective control registers.
Note: Tone Generator 2 should not be enabled simultane-
ously with the ringing oscillator due to resource sharing
within the hardware.
Continuous
phase
frequency-shift
keying
(FSK)
waveforms may be created using tone generator 1 (not
available on tone generator 2) by setting the REL bit
(direct Register 32, bit 6), which enables reloading of
the OSC1, OSC1X, and OSC1Y registers at the
expiration of the active timer (OAT1).
OSCnX
1
4
---
1
coeff
1
coeff
+
------------------------
2
15
1
Desired V
rms
1.11 V
rms
-------------------------------------
=
coeff
1
2
852
16000
-----------------
cos
0.94455
==
OSC1
0.94455 2
15
30951
78E6h
==
=
OSC1X
1
4
---
.05545
1.94455
---------------------
2
15
1
0.5
692
2B3h
=
coeff
2
1336
16000
--------------------
cos
0.86550
==
OSC2X
1
4
---
0.13450
1.86550
---------------------
2
15
1
0.5
1098
44Bh
=
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